summaryrefslogtreecommitdiff
path: root/doc/README.fsl-esdhc
diff options
context:
space:
mode:
authorYangbo Lu <yangbo.lu@freescale.com>2015-04-22 13:57:00 +0800
committerYork Sun <yorksun@freescale.com>2015-05-04 09:25:19 -0700
commit5a8dbdc6b4b8b4b17c807c9bb23807cdc66f6feb (patch)
tree13de7d43ebb84d211debe354937bcf1b8701c2f8 /doc/README.fsl-esdhc
parentfd3a78a538b2591a420f173faea442ae969ff623 (diff)
downloadu-boot-imx-5a8dbdc6b4b8b4b17c807c9bb23807cdc66f6feb.zip
u-boot-imx-5a8dbdc6b4b8b4b17c807c9bb23807cdc66f6feb.tar.gz
u-boot-imx-5a8dbdc6b4b8b4b17c807c9bb23807cdc66f6feb.tar.bz2
mmc: fsl_esdhc: Add adapter card type identification support
Add adapter card type identification support by reading FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function, define CONFIG_FSL_ESDHC_ADAPTER_IDENT. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> [York Sun: resolve conflicts in README.fsl-esdhc] Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'doc/README.fsl-esdhc')
-rw-r--r--doc/README.fsl-esdhc28
1 files changed, 23 insertions, 5 deletions
diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc
index 619c6b2..7e71387 100644
--- a/doc/README.fsl-esdhc
+++ b/doc/README.fsl-esdhc
@@ -1,6 +1,24 @@
-CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode.
-CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode.
-CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V.
+Freescale esdhc-specific options
-Accessing ESDHC registers can be determined by ESDHC IP's endian
-mode or processor's endian mode.
+ - CONFIG_FSL_ESDHC_ADAPTER_IDENT
+ Support Freescale adapter card type identification. This is implemented by
+ operating Qixis FPGA relevant registers. The STAT_PRES1 register has SDHC
+ Card ID[0:2] bits showing the type of card installed in the SDHC Adapter Slot.
+
+ SDHC Card ID[0:2] Adapter Card Type
+ 0b000 reserved
+ 0b001 eMMC Card Rev4.5
+ 0b010 SD/MMC Legacy Card
+ 0b011 eMMC Card Rev4.4
+ 0b100 reserved
+ 0b101 MMC Card
+ 0b110 SD Card Rev2.0/3.0
+ 0b111 No card is present
+ - CONFIG_SYS_FSL_ESDHC_LE
+ ESDHC IP is in little-endian mode. Accessing ESDHC registers can be
+ determined by ESDHC IP's endian mode or processor's endian mode.
+ - CONFIG_SYS_FSL_ESDHC_BE
+ ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined
+ by ESDHC IP's endian mode or processor's endian mode.
+
+ - CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V.