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authorStephen George <stephen.george@freescale.com>2013-03-25 07:40:12 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-24 16:54:12 -0500
commit49e946cb6ae0448492147ffcb9dcd7d0af1eab4d (patch)
tree07118135410c7b399c8ac780b6fa803ceebdfaea /doc/README.b4860qds
parent94025b1cd8d9959ebf987a7f6382d513c606ecf1 (diff)
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board/t4240qds, b4860qds: LAW/TLB for DCSR set to size 32M
Debug trace buffers are memory mapped in DCSR space beyond 4M. Signed-off-by: Stephen George <stephen.george@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'doc/README.b4860qds')
-rw-r--r--doc/README.b4860qds4
1 files changed, 2 insertions, 2 deletions
diff --git a/doc/README.b4860qds b/doc/README.b4860qds
index f6c5ff8..bd10a6d 100644
--- a/doc/README.b4860qds
+++ b/doc/README.b4860qds
@@ -185,7 +185,7 @@ Start Address End Address Description Size
0xF_A0C0_0000 0xF_DFFF_FFFF Free 1012 MB
0xF_A000_0000 0xF_A0BF_FFFF MAPLE0/1/2 12 MB
0xF_0040_0000 0xF_9FFF_FFFF Free 12 GB
-0xF_0000_0000 0xF_003F_FFFF DCSR 4 MB
+0xF_0000_0000 0xF_01FF_FFFF DCSR 32 MB
0xC_4000_0000 0xE_FFFF_FFFF Free 11 GB
0xC_3000_0000 0xC_3FFF_FFFF sRIO-2 I/O 256 MB
0xC_2000_0000 0xC_2FFF_FFFF sRIO-1 I/O 256 MB
@@ -215,7 +215,7 @@ Start Address End Address Description Size
0xF_A0C0_0000 0xF_DFFF_FFFF Free 1012 MB
0xF_A000_0000 0xF_A0BF_FFFF MAPLE0/1/2 12 MB
0xF_0040_0000 0xF_9FFF_FFFF Free 12 GB
-0xF_0000_0000 0xF_003F_FFFF DCSR 4 MB
+0xF_0000_0000 0xF_01FF_FFFF DCSR 32 MB
0xC_4000_0000 0xE_FFFF_FFFF Free 11 GB
0xC_3000_0000 0xC_3FFF_FFFF sRIO-2 I/O 256 MB
0xC_2000_0000 0xC_2FFF_FFFF sRIO-1 I/O 256 MB