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authorWolfgang Denk <wd@denx.de>2009-02-07 22:17:19 +0100
committerWolfgang Denk <wd@denx.de>2009-02-07 22:17:19 +0100
commite70ef33b6b57a37d56745904495fe298d2ecf03b (patch)
tree5d701c80f67d704c3e8f78b4c450d97f2da47caa /cpu
parent1b33a62bf9301f9e1611a44865bf3d2c51198993 (diff)
parent59d1bda7f92c8a28c3aba94e48063749d425949f (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ppc4xx/4xx_pci.c5
-rw-r--r--cpu/ppc4xx/4xx_pcie.c2
-rw-r--r--cpu/ppc4xx/fdt.c24
3 files changed, 26 insertions, 5 deletions
diff --git a/cpu/ppc4xx/4xx_pci.c b/cpu/ppc4xx/4xx_pci.c
index e8871fc..2e75886 100644
--- a/cpu/ppc4xx/4xx_pci.c
+++ b/cpu/ppc4xx/4xx_pci.c
@@ -588,8 +588,9 @@ void pci_init_board(void)
int busno;
busno = pci_440_init (&ppc440_hose);
-#if defined(CONFIG_440SPE) || \
- defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if (defined(CONFIG_440SPE) || \
+ defined(CONFIG_460EX) || defined(CONFIG_460GT)) && \
+ !defined(CONFIG_PCI_DISABLE_PCIE)
pcie_setup_hoses(busno + 1);
#endif
}
diff --git a/cpu/ppc4xx/4xx_pcie.c b/cpu/ppc4xx/4xx_pcie.c
index fd40d8a..58d96bb 100644
--- a/cpu/ppc4xx/4xx_pcie.c
+++ b/cpu/ppc4xx/4xx_pcie.c
@@ -33,7 +33,7 @@
#if (defined(CONFIG_440SPE) || defined(CONFIG_405EX) || \
defined(CONFIG_460EX) || defined(CONFIG_460GT)) && \
- defined(CONFIG_PCI)
+ defined(CONFIG_PCI) && !defined(CONFIG_PCI_DISABLE_PCIE)
#include <asm/4xx_pcie.h>
diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c
index c55e1cf..ba5c120 100644
--- a/cpu/ppc4xx/fdt.c
+++ b/cpu/ppc4xx/fdt.c
@@ -113,6 +113,7 @@ void fdt_pcie_setup(void *blob)
void ft_cpu_setup(void *blob, bd_t *bd)
{
sys_info_t sys_info;
+ int off, ndepth = 0;
get_sys_info(&sys_info);
@@ -133,9 +134,28 @@ void ft_cpu_setup(void *blob, bd_t *bd)
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
/*
- * Setup all baudrates for the UARTs
+ * Fixup all UART clocks for CPU internal UARTs
+ * (only these UARTs are definitely clocked by gd->uart_clk)
+ *
+ * These UARTs are direct childs of /plb/opb. This code
+ * does not touch any UARTs that are connected to the ebc.
*/
- do_fixup_by_compat_u32(blob, "ns16550", "clock-frequency", gd->uart_clk, 1);
+ off = fdt_path_offset(blob, "/plb/opb");
+ while ((off = fdt_next_node(blob, off, &ndepth)) >= 0) {
+ /*
+ * process all sub nodes and stop when we are back
+ * at the starting depth
+ */
+ if (ndepth <= 0)
+ break;
+
+ /* only update direct childs */
+ if ((ndepth == 1) &&
+ (fdt_node_check_compatible(blob, off, "ns16550") == 0))
+ fdt_setprop(blob, off,
+ "clock-frequency",
+ (void*)&(gd->uart_clk), 4);
+ }
/*
* Fixup all ethernet nodes