summaryrefslogtreecommitdiff
path: root/cpu
diff options
context:
space:
mode:
authorwdenk <wdenk>2005-04-02 23:52:25 +0000
committerwdenk <wdenk>2005-04-02 23:52:25 +0000
commit400558b561e2bdb47f87b96b3510dda0881a3662 (patch)
tree479fa3918e0031a95cdac9468cb8396e1f1a9b60 /cpu
parent414eec35e3832f4f9ce8a25ace7ead638be1f76f (diff)
downloadu-boot-imx-400558b561e2bdb47f87b96b3510dda0881a3662.zip
u-boot-imx-400558b561e2bdb47f87b96b3510dda0881a3662.tar.gz
u-boot-imx-400558b561e2bdb47f87b96b3510dda0881a3662.tar.bz2
Prepare for SoC rework of ARM code:
- rename CONFIG_BOOTBINFUNC into CONFIG_INIT_CRITICAL - rename memsetup into lowlevel_init (function name and source files)
Diffstat (limited to 'cpu')
-rw-r--r--cpu/arm720t/start.S4
-rw-r--r--cpu/arm920t/start.S4
-rw-r--r--cpu/at91rm9200/lowlevel.S4
-rw-r--r--cpu/at91rm9200/start.S8
-rw-r--r--cpu/lh7a40x/start.S4
-rw-r--r--cpu/mips/start.S2
-rw-r--r--cpu/pxa/start.S4
-rw-r--r--cpu/s3c44b0/start.S4
-rw-r--r--cpu/sa1100/start.S4
9 files changed, 18 insertions, 20 deletions
diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S
index bde936a..0e15965 100644
--- a/cpu/arm720t/start.S
+++ b/cpu/arm720t/start.S
@@ -316,10 +316,10 @@ cpu_init_crit:
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependent, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
mov pc, lr
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index f348193..a7cabf8 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -257,10 +257,10 @@ cpu_init_crit:
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
mov pc, lr
diff --git a/cpu/at91rm9200/lowlevel.S b/cpu/at91rm9200/lowlevel.S
index 030f9e1..c8af7a6 100644
--- a/cpu/at91rm9200/lowlevel.S
+++ b/cpu/at91rm9200/lowlevel.S
@@ -30,7 +30,7 @@
#include <config.h>
#include <version.h>
-#ifdef CONFIG_BOOTBINFUNC
+#ifdef CONFIG_INIT_CRITICAL
/*
* some parameters for the board
*
@@ -197,4 +197,4 @@ SMRDATA1:
.word SDRAM
.word SDRAM_VAL
/* SMRDATA1 is 176 bytes long */
-#endif /* CONFIG_BOOTBINFUNC */
+#endif /* CONFIG_INIT_CRITICAL */
diff --git a/cpu/at91rm9200/start.S b/cpu/at91rm9200/start.S
index 0dbc009..e897e6b 100644
--- a/cpu/at91rm9200/start.S
+++ b/cpu/at91rm9200/start.S
@@ -115,7 +115,7 @@ reset:
orr r0,r0,#0xd3 /* was 13 */
msr cpsr,r0
-#ifdef CONFIG_BOOTBINFUNC
+#ifdef CONFIG_INIT_CRITICAL
/* scratch stack */
ldr r1, =0x00204000
/* Insure word alignment */
@@ -141,7 +141,7 @@ reset:
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
orr r0, r0, #0xC0000000 @ set bits 31:30 (iA, nF)
mcr p15, 0, r0, c1, c0, 0 @ write r0 in cp15 control register (cp15 r1)
-#endif /* CONFIG_BOOTBINFUNC */
+#endif /* CONFIG_INIT_CRITICAL */
/*
* relocate exeception table
*/
@@ -160,9 +160,7 @@ copyex:
*/
#ifdef CONFIG_INIT_CRITICAL
bl cpu_init_crit
-#endif
-#ifdef CONFIG_BOOTBINFUNC
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
@@ -179,7 +177,7 @@ copy_loop:
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
-#endif /* CONFIG_BOOTBINFUNC */
+#endif /* CONFIG_INIT_CRITICAL */
/* Set up the stack */
stack_setup:
diff --git a/cpu/lh7a40x/start.S b/cpu/lh7a40x/start.S
index 4f023a5..5dca773 100644
--- a/cpu/lh7a40x/start.S
+++ b/cpu/lh7a40x/start.S
@@ -229,10 +229,10 @@ cpu_init_crit:
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
mov pc, lr
diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index 45a90a8..ff105a4 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -243,7 +243,7 @@ reset:
/* Initialize any external memory.
*/
- bal memsetup
+ bal lowlevel_init
nop
/* Initialize caches...
diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S
index d74f41f..da753a1 100644
--- a/cpu/pxa/start.S
+++ b/cpu/pxa/start.S
@@ -218,10 +218,10 @@ setspeed_done:
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
/* Memory interfaces are working. Disable MMU and enable I-cache. */
diff --git a/cpu/s3c44b0/start.S b/cpu/s3c44b0/start.S
index b4b7c3f..fc7f592 100644
--- a/cpu/s3c44b0/start.S
+++ b/cpu/s3c44b0/start.S
@@ -117,9 +117,9 @@ reset:
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
- bl memsetup
+ bl lowlevel_init
#endif
relocate: /* relocate U-Boot to RAM */
diff --git a/cpu/sa1100/start.S b/cpu/sa1100/start.S
index 7974344..08e41c7 100644
--- a/cpu/sa1100/start.S
+++ b/cpu/sa1100/start.S
@@ -213,10 +213,10 @@ cpu_init_crit:
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
- * find a memsetup.S in your board directory.
+ * find a lowlevel_init.S in your board directory.
*/
mov ip, lr
- bl memsetup
+ bl lowlevel_init
mov lr, ip
/*