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author | Michal Simek <monstr@monstr.eu> | 2007-05-08 14:52:52 +0200 |
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committer | Michal Simek <monstr@monstr.eu> | 2007-05-08 14:52:52 +0200 |
commit | 1a50f164beb065f360fbddb76029607d6b099698 (patch) | |
tree | a56a4027d0c68c5a5d9fdc15f0974650dd4fcb42 /cpu | |
parent | ab874d5047e5d30dbc1e517ff26083efffa98ecb (diff) | |
download | u-boot-imx-1a50f164beb065f360fbddb76029607d6b099698.zip u-boot-imx-1a50f164beb065f360fbddb76029607d6b099698.tar.gz u-boot-imx-1a50f164beb065f360fbddb76029607d6b099698.tar.bz2 |
add: Microblaze V5 exception handling
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/microblaze/exception.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/cpu/microblaze/exception.c b/cpu/microblaze/exception.c index b135acb..87ecbea 100644 --- a/cpu/microblaze/exception.c +++ b/cpu/microblaze/exception.c @@ -23,15 +23,16 @@ */ #include <common.h> +#include <asm/asm.h> void _hw_exception_handler (void) { int address = 0; int state = 0; /* loading address of exception EAR */ - __asm__ __volatile ("mfs %0,rear"::"r" (address):"memory"); + MFSEAR(address); /* loading excetpion state register ESR */ - __asm__ __volatile ("mfs %0,resr"::"r" (state):"memory"); + MFSESR(state); printf ("Hardware exception at 0x%x address\n", address); switch (state & 0x1f) { /* mask on exception cause */ case 0x1: @@ -49,6 +50,11 @@ void _hw_exception_handler (void) case 0x5: puts ("Divide by zero exception\n"); break; +#ifdef MICROBLAZE_V5 + case 0x1000: + puts ("Exception in delay slot\n"); + break; +#endif default: puts ("Undefined cause\n"); break; |