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authorDave Liu <r63238@freescale.com>2008-01-10 23:09:33 +0800
committerKim Phillips <kim.phillips@freescale.com>2008-01-10 21:24:11 -0600
commit061aad4d320dddce26247699dcf2875ee2ea1366 (patch)
tree95ae4f72e6b223cd7cba08802bd9b349a2562a45 /cpu
parentded08317ad9e340b887bf2eb46e9565a0f610a93 (diff)
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mpc83xx: Fix the bug of 266MHz data rate DDR
The DDR doesn't work on the 266MHz data rate, the patch fix the bug. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mpc83xx/spd_sdram.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 29dd470..0acca47 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -574,9 +574,9 @@ long int spd_sdram()
*/
cpo = 0;
if (spd.mem_type == SPD_MEMTYPE_DDR2) {
- if (effective_data_rate == 266 || effective_data_rate == 333) {
- cpo = 0x7; /* READ_LAT + 5/4 */
- } else if (effective_data_rate == 400) {
+ if (effective_data_rate == 266) {
+ cpo = 0x4; /* READ_LAT + 1/2 */
+ } else if (effective_data_rate == 333 || effective_data_rate == 400) {
cpo = 0x7; /* READ_LAT + 5/4 */
} else {
/* Automatic calibration */