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| author | wdenk <wdenk> | 2002-11-03 18:03:52 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2002-11-03 18:03:52 +0000 |
| commit | 699b13a6064e642280caffaa83c10b359a6c1114 (patch) | |
| tree | 8883f63834e4328bf51ff1341678b30ae2ffe9a5 /cpu/xscale | |
| parent | 24ee89b97a49826ea800b4a6c0d5c0769328e317 (diff) | |
| download | u-boot-imx-699b13a6064e642280caffaa83c10b359a6c1114.zip u-boot-imx-699b13a6064e642280caffaa83c10b359a6c1114.tar.gz u-boot-imx-699b13a6064e642280caffaa83c10b359a6c1114.tar.bz2 | |
* Fix mdelay() on TRAB - this was still the debugging version with
seconds instead of ms.
* Patch by Robert Schwebel, 1 Nov 2002:
XScale related cleanup (affects all ARM boards)
* Cleanup of names, warnings and README.
Diffstat (limited to 'cpu/xscale')
| -rw-r--r-- | cpu/xscale/start.S | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/cpu/xscale/start.S b/cpu/xscale/start.S index f1049a8..6cc7c43 100644 --- a/cpu/xscale/start.S +++ b/cpu/xscale/start.S @@ -96,7 +96,7 @@ _armboot_real_end: */ .globl _uboot_reloc _uboot_reloc: - .word CFG_DRAM_BASE + CFG_DRAM_SIZE - CFG_MONITOR_LEN + .word TEXT_BASE #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ @@ -130,7 +130,6 @@ relocate: /* relocate U-Boot to RAM */ ldr r2, _armboot_start ldr r3, _armboot_end sub r2, r3, r2 /* r2 <- size of armboot */ -/* ldr r1, _uboot_reloc / * r1 <- destination address */ ldr r1, _TEXT_BASE add r2, r0, r2 /* r2 <- source end address */ @@ -176,7 +175,7 @@ cpuspeed: .word CFG_CPUSPEED /* RS: ??? */ .macro CPWAIT - mrc p15,0,r0,c2,c0,0 + mrc p15,0,r0,c2,c0,0 mov r0,r0 sub pc,pc,#4 .endm @@ -207,23 +206,23 @@ cpu_init_crit: ldr r0, =0x2001 /* enable access to all coproc. */ mcr p15, 0, r0, c15, c1, 0 - CPWAIT + CPWAIT mcr p15, 0, r0, c7, c10, 4 /* drain the write & fill buffers */ - CPWAIT + CPWAIT mcr p15, 0, r0, c7, c7, 0 /* flush Icache, Dcache and BTB */ - CPWAIT + CPWAIT mcr p15, 0, r0, c8, c7, 0 /* flush instuction and data TLBs */ - CPWAIT + CPWAIT /* Enable the Icache */ /* mrc p15, 0, r0, c1, c0, 0 orr r0, r0, #0x1800 mcr p15, 0, r0, c1, c0, 0 - CPWAIT + CPWAIT */ mov pc, lr |