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| author | Dave Liu <daveliu@freescale.com> | 2008-11-21 16:31:43 +0800 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2009-01-23 17:03:14 -0600 |
| commit | b4983e16d150ab7d039704c310aacbd2f4dc1e0f (patch) | |
| tree | e9d6b115e91cea5fe4e1ca3edc7d86bb28e4c190 /cpu/mpc8xxx | |
| parent | 22cca7e1cd54590e967c73558b07ffbdccd39504 (diff) | |
| download | u-boot-imx-b4983e16d150ab7d039704c310aacbd2f4dc1e0f.zip u-boot-imx-b4983e16d150ab7d039704c310aacbd2f4dc1e0f.tar.gz u-boot-imx-b4983e16d150ab7d039704c310aacbd2f4dc1e0f.tar.bz2 | |
fsl-ddr: use the 1T timing as default configuration
For light loaded system, we use the 1T timing to gain better
memory performance, but for some heavily loaded system,
you have to add the 2T timing options to board files.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'cpu/mpc8xxx')
| -rw-r--r-- | cpu/mpc8xxx/ddr/options.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/mpc8xxx/ddr/options.c b/cpu/mpc8xxx/ddr/options.c index af7f73a..d4702d7 100644 --- a/cpu/mpc8xxx/ddr/options.c +++ b/cpu/mpc8xxx/ddr/options.c @@ -142,7 +142,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, * - number of components, number of active ranks * - how much time you want to spend playing around */ - popts->twoT_en = 1; + popts->twoT_en = 0; popts->threeT_en = 0; /* |