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authorKumar Gala <galak@kernel.crashing.org>2007-11-29 02:10:09 -0600
committerKumar Gala <galak@kernel.crashing.org>2007-12-11 22:34:20 -0600
commit04db400892da37b76a585e332a0c137954ad2015 (patch)
tree201c757a3032f786588d94c0fde8469a865b40b5 /cpu/mpc85xx/interrupts.c
parent2714223f8e04ab3e4133ff65872eef366d90bfea (diff)
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Stop using immap_t on 85xx
In the future the offsets to various blocks may not be in same location. Move to using CFG_MPC85xx_*_ADDR as the base of the registers instead of getting it via &immap. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'cpu/mpc85xx/interrupts.c')
-rw-r--r--cpu/mpc85xx/interrupts.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/cpu/mpc85xx/interrupts.c b/cpu/mpc85xx/interrupts.c
index bf737d6..18e5377 100644
--- a/cpu/mpc85xx/interrupts.c
+++ b/cpu/mpc85xx/interrupts.c
@@ -80,19 +80,17 @@ int disable_interrupts (void)
int interrupt_init (void)
{
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
- immr->im_pic.gcr = MPC85xx_PICGCR_RST;
- while (immr->im_pic.gcr & MPC85xx_PICGCR_RST);
- immr->im_pic.gcr = MPC85xx_PICGCR_M;
+ pic->gcr = MPC85xx_PICGCR_RST;
+ while (pic->gcr & MPC85xx_PICGCR_RST);
+ pic->gcr = MPC85xx_PICGCR_M;
decrementer_count = get_tbclk() / CFG_HZ;
mtspr(SPRN_TCR, TCR_PIE);
set_dec (decrementer_count);
set_msr (get_msr () | MSR_EE);
#ifdef CONFIG_INTERRUPTS
- volatile ccsr_pic_t *pic = &immr->im_pic;
-
pic->iivpr1 = 0x810002; /* 50220 enable ecm interrupts */
debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1);