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authorStefan Roese <sr@denx.de>2007-12-27 19:37:26 +0100
committerStefan Roese <sr@denx.de>2007-12-27 19:37:26 +0100
commitbb701283a8dcb2521000fe437f19a83cadc98b02 (patch)
treec8fe6881bf3b607b18b098009a64650357e848f5 /cpu/mpc85xx/fdt.c
parentb568fd25574181a3b12ae3d66b2913903442cb83 (diff)
parent0dcfe3a225a9436fc514f374a19242c672f1172b (diff)
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Merge branch 'master' of /home/stefan/git/u-boot/u-boot into for-1.3.2-ver2
Diffstat (limited to 'cpu/mpc85xx/fdt.c')
-rw-r--r--cpu/mpc85xx/fdt.c64
1 files changed, 64 insertions, 0 deletions
diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
new file mode 100644
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+++ b/cpu/mpc85xx/fdt.c
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+/*
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <libfdt.h>
+#include <fdt_support.h>
+
+void ft_cpu_setup(void *blob, bd_t *bd)
+{
+#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
+ defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
+ fdt_fixup_ethernet(blob, bd);
+#endif
+
+ do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+ "timebase-frequency", bd->bi_busfreq / 8, 1);
+ do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+ "bus-frequency", bd->bi_busfreq, 1);
+ do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
+ "clock-frequency", bd->bi_intfreq, 1);
+ do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
+ "bus-frequency", bd->bi_busfreq, 1);
+#ifdef CONFIG_QE
+ do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
+ "bus-frequency", bd->bi_busfreq, 1);
+#endif
+
+#ifdef CFG_NS16550
+ do_fixup_by_compat_u32(blob, "ns16550",
+ "clock-frequency", bd->bi_busfreq, 1);
+#endif
+
+#ifdef CONFIG_CPM2
+ do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
+ "current-speed", bd->bi_baudrate, 1);
+
+ do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
+ "clock-frequency", bd->bi_brgfreq, 1);
+#endif
+
+ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+}