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authorwdenk <wdenk>2004-01-29 09:22:58 +0000
committerwdenk <wdenk>2004-01-29 09:22:58 +0000
commit6876609446980c3055bbd32c195a63330e21d8e6 (patch)
treeb01a5dcb24de0cc0a020b142986eb64287f39422 /cpu/mips
parentc178d3da6f1ac765cd880530a0672540b415a01c (diff)
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* Implement adaptive SDRAM timing configuration based on actual CPU
clock frequency for INCA-IP; fix problem with board hanging when switching from 150MHz to 100MHz * Add PCMCIA CS support for BMS2003 board
Diffstat (limited to 'cpu/mips')
-rw-r--r--cpu/mips/incaip_clock.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/cpu/mips/incaip_clock.c b/cpu/mips/incaip_clock.c
index 9f32759..65ee847 100644
--- a/cpu/mips/incaip_clock.c
+++ b/cpu/mips/incaip_clock.c
@@ -101,13 +101,15 @@ int incaip_set_cpuclk (void)
{
extern void ebu_init(long);
extern void cgu_init(long);
+ extern void sdram_init(long);
uchar tmp[64];
ulong cpuclk;
if (getenv_r ("cpuclk", tmp, sizeof (tmp)) > 0) {
cpuclk = simple_strtoul (tmp, NULL, 10) * 1000000;
- ebu_init (cpuclk);
cgu_init (cpuclk);
+ ebu_init (cpuclk);
+ sdram_init (cpuclk);
}
return 0;