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authorTsiChungLiew <Tsi-Chung.Liew@freescale.com>2008-01-14 17:46:19 -0600
committerTsiChungLiew <Tsi-Chung.Liew@freescale.com>2008-01-17 14:59:41 -0600
commitc87581027994c148131b2f11aa75501f782ec19a (patch)
tree9e75128b107ca6da73d78fde5c103574b9083918 /cpu/mcf5227x/interrupts.c
parent1552af70ecab11b9f3dceff7528ed15faf678b9d (diff)
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ColdFire: Add MCF5227x cpu and MCF52277EVB support-2
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com> Signed-off by: John Rigby <jrigby@freescale.com>
Diffstat (limited to 'cpu/mcf5227x/interrupts.c')
-rw-r--r--cpu/mcf5227x/interrupts.c52
1 files changed, 52 insertions, 0 deletions
diff --git a/cpu/mcf5227x/interrupts.c b/cpu/mcf5227x/interrupts.c
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+/*
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* CPU specific interrupt routine */
+#include <common.h>
+#include <asm/immap.h>
+
+int interrupt_init(void)
+{
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ /* Make sure all interrupts are disabled */
+ intp->imrh0 |= 0xFFFFFFFF;
+ intp->imrl0 |= 0xFFFFFFFF;
+
+ enable_interrupts();
+ return 0;
+}
+
+#if defined(CONFIG_MCFTMR)
+void dtimer_intr_setup(void)
+{
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
+ intp->imrh0 &= ~CFG_TMRINTR_MASK;
+}
+#endif