summaryrefslogtreecommitdiff
path: root/cpu/at32ap/at32ap700x/gpio.c
diff options
context:
space:
mode:
authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-10-29 13:23:33 +0100
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-12-17 10:34:12 +0100
commit5fee84a794a51ec830548cda485a770efb018b92 (patch)
treeec47a3544038b4310917f9570c0f1531f480eba5 /cpu/at32ap/at32ap700x/gpio.c
parent36f28f8a9605ee5dcfa330482cfc62171261af97 (diff)
downloadu-boot-imx-5fee84a794a51ec830548cda485a770efb018b92.zip
u-boot-imx-5fee84a794a51ec830548cda485a770efb018b92.tar.gz
u-boot-imx-5fee84a794a51ec830548cda485a770efb018b92.tar.bz2
AVR32: Make some AT32AP700x peripherals optional
Add a chip-features file providing definitions of the form AT32AP700x_CHIP_HAS_<peripheral> to indicate the availability of the given peripheral on the currently selected chip. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'cpu/at32ap/at32ap700x/gpio.c')
-rw-r--r--cpu/at32ap/at32ap700x/gpio.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c
index 52f5372..2d53726 100644
--- a/cpu/at32ap/at32ap700x/gpio.c
+++ b/cpu/at32ap/at32ap700x/gpio.c
@@ -21,6 +21,7 @@
*/
#include <common.h>
+#include <asm/arch/chip-features.h>
#include <asm/arch/gpio.h>
/*
@@ -52,6 +53,7 @@ void gpio_enable_ebi(void)
#endif
}
+#ifdef AT32AP700x_CHIP_HAS_USART
void gpio_enable_usart0(void)
{
gpio_select_periph_B(GPIO_PIN_PA8, 0);
@@ -75,7 +77,9 @@ void gpio_enable_usart3(void)
gpio_select_periph_B(GPIO_PIN_PB18, 0);
gpio_select_periph_B(GPIO_PIN_PB19, 0);
}
+#endif
+#ifdef AT32AP700x_CHIP_HAS_MACB
void gpio_enable_macb0(void)
{
gpio_select_periph_A(GPIO_PIN_PC3, 0); /* TXD0 */
@@ -125,7 +129,9 @@ void gpio_enable_macb1(void)
gpio_select_periph_B(GPIO_PIN_PD15, 0); /* SPD */
#endif
}
+#endif
+#ifdef AT32AP700x_CHIP_HAS_MMCI
void gpio_enable_mmci(void)
{
gpio_select_periph_A(GPIO_PIN_PA10, 0); /* CLK */
@@ -135,3 +141,4 @@ void gpio_enable_mmci(void)
gpio_select_periph_A(GPIO_PIN_PA14, 0); /* DATA2 */
gpio_select_periph_A(GPIO_PIN_PA15, 0); /* DATA3 */
}
+#endif