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authorMinkyu Kang <mk7.kang@samsung.com>2009-12-18 15:03:51 +0900
committerTom Rix <Tom.Rix@windriver.com>2010-01-23 08:15:48 -0600
commitd8e5f55475e621e793a15d93e2dd2549c5138735 (patch)
tree84b5d3a6093cf96379ea23f3bf4b6e655d5a9185 /cpu/arm_cortexa8/s5pc1xx/Makefile
parent17ef9104ae11220979e1870f22dcaf535d9baacf (diff)
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s5pc1xx: update cache routines
Because of v7_flush_dcache_all is moved to omap3/cache.S and s5pc110 needs cache routines, update s5pc1xx cache routines. l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S and invalidate_dcache is modified for SoC specific. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'cpu/arm_cortexa8/s5pc1xx/Makefile')
-rw-r--r--cpu/arm_cortexa8/s5pc1xx/Makefile4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile b/cpu/arm_cortexa8/s5pc1xx/Makefile
index e08d9d8..4f922e6 100644
--- a/cpu/arm_cortexa8/s5pc1xx/Makefile
+++ b/cpu/arm_cortexa8/s5pc1xx/Makefile
@@ -28,9 +28,9 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-SOBJS = reset.o
+SOBJS = cache.o
+SOBJS += reset.o
-COBJS += cache.o
COBJS += clock.o
COBJS += cpu_info.o
COBJS += timer.o