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authorwdenk <wdenk>2005-04-05 22:30:50 +0000
committerwdenk <wdenk>2005-04-05 22:30:50 +0000
commitb304c96871c92d1ec8fa57dda36cc198660fd10e (patch)
treeb45ea6bbac8eee483d99eccbddda21af57f8e8be /cpu/arm920t/s3c24x0/interrupts.c
parent12b43d515c62682fcf7b578f31920a2be49142fe (diff)
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Patches by Steven Scholz, 05 Apr 2005:
- Use i.MX watchdog timer for reset_cpu() - Move reset_cpu() out of cpu/arm920t/start.S into the SoC specific subdirectories cpu/arm920t/imx/ and cpu/arm920t/s3c24x0/ (now in interupts.c)
Diffstat (limited to 'cpu/arm920t/s3c24x0/interrupts.c')
-rw-r--r--cpu/arm920t/s3c24x0/interrupts.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/cpu/arm920t/s3c24x0/interrupts.c
index 868621f..ba835f3 100644
--- a/cpu/arm920t/s3c24x0/interrupts.c
+++ b/cpu/arm920t/s3c24x0/interrupts.c
@@ -185,4 +185,31 @@ ulong get_tbclk (void)
return tbclk;
}
+/*
+ * reset the cpu by setting up the watchdog timer and let him time out
+ */
+void reset_cpu (ulong ignored)
+{
+ S3C24X0_WATCHDOG * const watchdog;
+
+#ifdef CONFIG_TRAB
+ disable_vfd();
+#endif
+
+ watchdog = S3C24X0_GetBase_WATCHDOG();
+
+ /* Disable watchdog */
+ watchdog->WTCON = 0x0000;
+
+ /* Initialize watchdog timer count register */
+ watchdog->WTCNT = 0x0001;
+
+ /* Enable watchdog timer; assert reset at timer timeout */
+ watchdog->WTCON = 0x0021;
+
+ while(1); /* loop forever and wait for reset to happen */
+
+ /*NOTREACHED*/
+}
+
#endif /* defined(CONFIG_S3C2400) || defined (CONFIG_S3C2410) || defined (CONFIG_TRAB) */