diff options
author | Terry Lv <r65388@freescale.com> | 2010-02-24 18:34:13 +0800 |
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committer | Terry Lv <r65388@freescale.com> | 2010-03-04 14:55:00 +0800 |
commit | bd6578e46d1ba93ffe6e00147704d7d18c7e5573 (patch) | |
tree | 424b9a30a2e791ff267b2aaa27d0d52186693b8e /cpu/arm1136 | |
parent | 871825c1148b233fb562c09204700b59fcd28b67 (diff) | |
download | u-boot-imx-bd6578e46d1ba93ffe6e00147704d7d18c7e5573.zip u-boot-imx-bd6578e46d1ba93ffe6e00147704d7d18c7e5573.tar.gz u-boot-imx-bd6578e46d1ba93ffe6e00147704d7d18c7e5573.tar.bz2 |
ENGR00120520: Enable MMU for mx51 and mx35
MMU enable code is missed in mx51 and mx35 u-boot.
So add these codes.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'cpu/arm1136')
-rw-r--r-- | cpu/arm1136/cpu.c | 76 | ||||
-rw-r--r-- | cpu/arm1136/mx35/generic.c | 13 |
2 files changed, 75 insertions, 14 deletions
diff --git a/cpu/arm1136/cpu.c b/cpu/arm1136/cpu.c index a4afd89..71f039c 100644 --- a/cpu/arm1136/cpu.c +++ b/cpu/arm1136/cpu.c @@ -8,7 +8,7 @@ * (C) Copyright 2002 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> * - * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. + * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -36,8 +36,65 @@ #include <common.h> #include <command.h> #include <asm/system.h> +#include <asm/cache-cp15.h> +#include <asm/mmu.h> -static void cache_flush(void); +#define dcache_invalidate_all_l1() \ +{ \ + int i = 0; \ + /* Clean and Invalidate Entire Data Cache */ \ + asm volatile ("mcr p15, 0, %0, c7, c14, 0;" \ + : \ + : "r"(i) \ + : "memory"); \ + asm volatile ("mcr p15, 0, %0, c8, c7, 0;" \ + : \ + : "r"(i) \ + : "memory"); /* Invalidate i+d-TLBs */ \ +} + +#define dcache_disable_l1() \ +{ \ + int i = 0; \ + asm volatile ("mcr p15, 0, %0, c7, c6, 0;" \ + : \ + : "r"(i)); /* clear data cache */ \ + asm volatile ("mrc p15, 0, %0, c1, c0, 0;" \ + : "=r"(i)); \ + i &= (~0x0004); /* disable DCache */ \ + /* but not MMU and alignment faults */ \ + asm volatile ("mcr p15, 0, %0, c1, c0, 0;" \ + : \ + : "r"(i)); \ +} + +#define icache_invalidate_all_l1() \ +{ \ + /* this macro can discard dirty cache lines (N/A for ICache) */ \ + int i = 0; \ + asm volatile ("mcr p15, 0, %0, c7, c5, 0;" \ + : \ + : "r"(i)); /* flush ICache */ \ + asm volatile ("mcr p15, 0, %0, c8, c5, 0;" \ + : \ + : "r"(i)); /* flush ITLB only */ \ + asm volatile ("mcr p15, 0, %0, c7, c5, 4;" \ + : \ + : "r"(i)); /* flush prefetch buffer */ \ + asm ( \ + "nop;" /* next few instructions may be via cache */ \ + "nop;" \ + "nop;" \ + "nop;" \ + "nop;" \ + "nop;"); \ +} + +#define cache_flush() \ +{ \ + dcache_invalidate_all_l1(); \ + icache_invalidate_all_l1(); \ +} int cleanup_before_linux (void) { @@ -59,12 +116,16 @@ int cleanup_before_linux (void) lcd_panel_disable(); } #endif + /* flush I/D-cache */ + cache_flush(); /* turn off I/D-cache */ icache_disable(); dcache_disable(); - /* flush I/D-cache */ - cache_flush(); + + /* MMU Off */ + MMU_OFF(); + /*Workaround to enable L2CC during kernel decompressing*/ #ifdef fixup_before_linux fixup_before_linux; @@ -72,10 +133,3 @@ int cleanup_before_linux (void) return 0; } -static void cache_flush(void) -{ - unsigned long i = 0; - - asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i)); /* invalidate both caches and flush btb */ - asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i)); /* mem barrier to sync things */ -} diff --git a/cpu/arm1136/mx35/generic.c b/cpu/arm1136/mx35/generic.c index 7d1bbca..05feda4 100644 --- a/cpu/arm1136/mx35/generic.c +++ b/cpu/arm1136/mx35/generic.c @@ -27,6 +27,7 @@ #include <asm/io.h> #include <asm/errno.h> #include <asm/arch/mx35.h> +#include <asm/cache-cp15.h> #include "crm_regs.h" #define CLK_CODE(arm, ahb, sel) (((arm) << 16) + ((ahb) << 8) + (sel)) @@ -116,7 +117,7 @@ static u32 __decode_pll(u32 reg, u32 infreq) static u32 __get_mcu_main_clk(void) { - u32 arm_div, fi, fd; + u32 arm_div = 0, fi = 0, fd = 0; arm_div = __get_arm_div(__REG(CCM_BASE_ADDR + CLKCTL_PDR0), &fi, &fd); fi *= __decode_pll(__REG(MCU_PLL), @@ -357,6 +358,11 @@ int print_cpuinfo(void) } #endif +#if defined(CONFIG_MXC_FEC) +extern int mxc_fec_initialize(bd_t *bis); +extern void mxc_fec_set_mac_from_env(char *mac_addr); +#endif + /* * Initializes on-chip ethernet controllers. * to override, implement board_eth_init() @@ -364,15 +370,16 @@ int print_cpuinfo(void) int cpu_eth_init(bd_t *bis) { int rc = -ENODEV; - char *env = NULL; #if defined(CONFIG_MXC_FEC) + char *env = NULL; + rc = mxc_fec_initialize(bis); -#endif env = getenv("fec_addr"); if (env) mxc_fec_set_mac_from_env(env); +#endif return rc; } |