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| author | Dave Liu <daveliu@freescale.com> | 2008-10-23 21:59:35 +0800 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-31 00:25:08 +0100 |
| commit | d685b74c64a38849f1a129b3ab846fbf67dd937e (patch) | |
| tree | 5d54e7ffb276dc281d2b59af70f521c8810b302a /cpu/74xx_7xx/start.S | |
| parent | d344293a5b953eff1c8617e6b89703e82f7ca13f (diff) | |
| download | u-boot-imx-d685b74c64a38849f1a129b3ab846fbf67dd937e.zip u-boot-imx-d685b74c64a38849f1a129b3ab846fbf67dd937e.tar.gz u-boot-imx-d685b74c64a38849f1a129b3ab846fbf67dd937e.tar.bz2 | |
74xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
The patch is following the commit 392438406041415fe64ab8748ec5ab5ad01d1cf7
mpc86xx: use r4 instead of r2 in lock_ram_in_cache and unlock_ram_in_cache
This is needed in unlock_ram_in_cache() because it is called from C and
will corrupt the small data area anchor that is kept in R2.
lock_ram_in_cache() is modified similarly as good coding practice, but
is not called from C.
Signed-off-by: Nick Spence <nick.spence@freescale.com>
also, the r2 is used as global data pointer.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Diffstat (limited to 'cpu/74xx_7xx/start.S')
| -rw-r--r-- | cpu/74xx_7xx/start.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S index 07bbe01..b5484e3 100644 --- a/cpu/74xx_7xx/start.S +++ b/cpu/74xx_7xx/start.S @@ -857,9 +857,9 @@ lock_ram_in_cache: */ lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l - li r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \ + li r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \ (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32 - mtctr r2 + mtctr r4 1: dcbz r0, r3 addi r3, r3, 32 @@ -878,9 +878,9 @@ unlock_ram_in_cache: /* invalidate the INIT_RAM section */ lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l - li r2, ((CONFIG_SYS_INIT_RAM_END & ~31) + \ + li r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \ (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32 - mtctr r2 + mtctr r4 1: icbi r0, r3 addi r3, r3, 32 bdnz 1b |