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authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>2016-01-13 16:25:37 +0530
committerMichal Simek <michal.simek@xilinx.com>2016-09-22 07:33:21 +0200
commit6b2450143882987f4287ea78783866c5f9ac4aff (patch)
treed9b34e4e26cd9269e33da98c50161f4c7f714c26 /configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
parent5242772c5113850c0c35d6271fd281dfc669c707 (diff)
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fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig')
-rw-r--r--configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index a3fb226..6afacd2 100644
--- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
@@ -38,6 +38,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BLK=y
+CONFIG_FPGA_XILINX=y
+CONFIG_FPGA_ZYNQMPPL=y
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_CADENCE=y