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authorPeng Fan <Peng.Fan@freescale.com>2015-09-14 13:34:45 +0800
committerStefano Babic <sbabic@denx.de>2015-09-20 09:40:19 +0200
commit4fae48e8a955728471e02db38195294940396f04 (patch)
tree179ee98def85babf8dba946e8ca4fc4a7cb11d10 /configs/tricorder_defconfig
parent623d96e89aca64c2762150087f4e872c55481f13 (diff)
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imx: mx7dsabresd set wdog SRS bit
We use trigger pmic reset to reset the board, so set bit SRS to disable internal WDOG_RESET_B_DEB to make reset stable. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'configs/tricorder_defconfig')
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