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| author | Peng Fan <peng.fan@nxp.com> | 2017-02-22 16:21:51 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-04-05 17:23:52 +0800 |
| commit | 1cbf9f3576dc8fcde480e449f620911f75d676ed (patch) | |
| tree | 7e76d58dc234cf84805be0f94af2700d6bdc34df /configs/socfpga_arria5_defconfig | |
| parent | 451cd4a5893818d4af9c64ad9b7b81a36a257bfe (diff) | |
| download | u-boot-imx-1cbf9f3576dc8fcde480e449f620911f75d676ed.zip u-boot-imx-1cbf9f3576dc8fcde480e449f620911f75d676ed.tar.gz u-boot-imx-1cbf9f3576dc8fcde480e449f620911f75d676ed.tar.bz2 | |
serial: lpuart: restructure lpuart driver
Drop CONFIG_LPUART_32B_REG.
Move the register structure to a common file include/fsl_lpuart.h
Define lpuart_serial_platdata structure which includes the reg base and flags.
For 32Bit register access, use lpuart_read32/lpuart_write32 which handles
big/little endian.
For 8Bit register access, still use the orignal code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@nxp.com>
Cc: Alison Wang <b18965@freescale.com>
Diffstat (limited to 'configs/socfpga_arria5_defconfig')
0 files changed, 0 insertions, 0 deletions