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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-05 14:43:00 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-07 00:15:03 +0900 |
| commit | ee470645d169cd0f47f66be8c8f69e061e3665d4 (patch) | |
| tree | 61a84e648b253f5b1b9a3fd1fc7ffb01ec65f06f /configs/qemu_mipsel_defconfig | |
| parent | 6c45ef4b948abd92f299d4ca1ab99c9cdea6bf8e (diff) | |
| download | u-boot-imx-ee470645d169cd0f47f66be8c8f69e061e3665d4.zip u-boot-imx-ee470645d169cd0f47f66be8c8f69e061e3665d4.tar.gz u-boot-imx-ee470645d169cd0f47f66be8c8f69e061e3665d4.tar.bz2 | |
ARM: UniPhier: enable I2C input pins for PH1-sLD8
To use I2C controllers on PH1-sLD8, the bit 10 (SCL0/SDA0)
and bit 11 (SCL1/SDA1) of IECTRL register must be set.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'configs/qemu_mipsel_defconfig')
0 files changed, 0 insertions, 0 deletions