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authorMingkai Hu <Mingkai.hu@freescale.com>2015-12-07 16:58:54 +0800
committerYork Sun <yorksun@freescale.com>2015-12-17 08:52:18 +0800
commit0d6faf2bd0d12642e8b2c428d62c285f4ee28b9d (patch)
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parent2949ae521200ae5758ae395a364fcb4e85f899c0 (diff)
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armv8/ls1043a: Implement workaround for PEX erratum A009929
Consecutive write transactions from core to PCI express outbound path hangs after 25 to 30 transactions depending on core freq. This erratum enable the mbist clock through COP register setting. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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