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authorAlex Porosanu <alexandru.porosanu@freescale.com>2016-04-29 15:17:58 +0300
committerYork Sun <york.sun@nxp.com>2016-05-18 08:51:46 -0700
commite99d7193593cf6331ea04cd394a9a4cf18886ef0 (patch)
treea187ad9403f8e304c9dd954aec3a8aad51557e08 /configs/difrnce_dit4350_defconfig
parent56747bfdbd6f2c5bc391d0c9d5eb20a6a2d50505 (diff)
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arch/arm: add SEC JR0 offset
Freescale PPC SoCs do not hard-code security engine's Job Ring 0 address, rather a define is used. This patch adds the same functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts) Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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