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authorLokesh Vutla <lokeshvutla@ti.com>2016-07-25 15:45:44 +0530
committerJagan Teki <jteki@openedev.com>2016-07-30 00:15:00 +0530
commit4d790788ce009909842290e85d3e57db36935ad4 (patch)
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parentb302669f46ebfd7cbc8ee1cdf48d87a68b1cc720 (diff)
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ARM: dra7xx: Change DPLL_PER_HS13 divider value
According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz clock, so that driver can use the same. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
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