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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-28 06:53:53 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-29 20:59:08 +0900 |
commit | c0efc3140e75e3ffd6127a5aec97b75347ec7417 (patch) | |
tree | 84f3f3517644797c13c2e4e802db8c05e09412a5 /configs/T2081QDS_SPIFLASH_defconfig | |
parent | 0b93e3de1e5ec9c7db7ffcf33bc9dcaddff91109 (diff) | |
download | u-boot-imx-c0efc3140e75e3ffd6127a5aec97b75347ec7417.zip u-boot-imx-c0efc3140e75e3ffd6127a5aec97b75347ec7417.tar.gz u-boot-imx-c0efc3140e75e3ffd6127a5aec97b75347ec7417.tar.bz2 |
ARM: uniphier: change CONFIG_SPL_PAD_TO to 128KB
The Boot ROM supports authentication feature to prevent malformed
software from being run on products. The signature is added at the
tail of the second stage loader (= SPL in U-boot terminology).
The size of the second stage loader was 64KB, and it was consistent
across SoCs. The situation changed when LD20 SoC appeared; it loads
80KB second stage loader, and it is the only exception.
Currently, CONFIG_SPL_PAD_TO is set to 64KB and U-Boot proper is
loaded from the 64KB offset of non-volatile devices. This means the
signature of LD20 SoC (located at 80KB offset) corrupts the U-Boot
proper image.
Let's move the U-Boot proper image to 128KB offset. It uses 48KB
for nothing but padding, and we could actually locate the U-Boot
proper at 80KB offset. However, the power of 2 generally seems a
better choice for the offset address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'configs/T2081QDS_SPIFLASH_defconfig')
0 files changed, 0 insertions, 0 deletions