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| author | Simon Glass <sjg@chromium.org> | 2016-09-12 23:18:28 -0600 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-09-16 17:03:41 -0400 |
| commit | 3433a693a9cf143b6e5f0d7190b4df4d1c82418e (patch) | |
| tree | 4e9094c2307ef94684c4d4933f9881bfa6c08ab2 /configs/P3041DS_SECURE_BOOT_defconfig | |
| parent | f73329ee82a088aafd5bea3006a9f47bf27197e5 (diff) | |
| download | u-boot-imx-3433a693a9cf143b6e5f0d7190b4df4d1c82418e.zip u-boot-imx-3433a693a9cf143b6e5f0d7190b4df4d1c82418e.tar.gz u-boot-imx-3433a693a9cf143b6e5f0d7190b4df4d1c82418e.tar.bz2 | |
Move existing use of CONFIG_SPL_DM to Kconfig
A few boards define this in a header file which is incorrect. It means that
Kconfig options that rely on this cannot be used. Move it.
Note that quite a few boards defined this options but do not appear to
actually use SPL:
BSC9132QDS_NOR_DDRCLK100_SECURE
BSC9132QDS_NOR_DDRCLK133_SECURE
BSC9132QDS_SDCARD_DDRCLK100_SECURE
BSC9132QDS_SDCARD_DDRCLK133_SECURE
BSC9132QDS_SPIFLASH_DDRCLK100_SECURE
BSC9132QDS_SPIFLASH_DDRCLK133_SECURE
C29XPCIE_NOR_SECBOOT
P1010RDB-PA_36BIT_NAND_SECBOOT
P1010RDB-PA_36BIT_SPIFLASH_SECBOOT
P1010RDB-PA_NAND_SECBOOT
P1010RDB-PA_NOR_SECBOOT
P1010RDB-PB_36BIT_NOR_SECBOOT
P1010RDB-PB_36BIT_SPIFLASH_SECBOOT
P1010RDB-PB_NAND_SECBOOT
P1010RDB-PB_NOR_SECBOOT
P3041DS_SECURE_BOOT
P4080DS_SECURE_BOOT
P5020DS_NAND_SECURE_BOOT
P5040DS_SECURE_BOOT
T1023RDB_SECURE_BOOT
T1024QDS_DDR4_SECURE_BOOT
T1024QDS_SECURE_BOOT
T1024RDB_SECURE_BOOT
T1040RDB_SECURE_BOOT
T1042D4RDB_SECURE_BOOT
T1042RDB_SECURE_BOOT
T2080QDS_SECURE_BOOT
T2080RDB_SECURE_BOOT
T4160QDS_SECURE_BOOT
T4240QDS_SECURE_BOOT
ls1021aqds_nor_SECURE_BOOT
ls1021atwr_nor_SECURE_BOOT
ls1043ardb_SECURE_BOOT
For these boards CONFIG_SPL_DM will no-longer be defined in SPL. But since
they apparently don't have an SPL, this should not matter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/P3041DS_SECURE_BOOT_defconfig')
0 files changed, 0 insertions, 0 deletions