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authorBo Shen <voice.shen@atmel.com>2014-12-15 18:12:47 +0800
committerMarek Vasut <marex@denx.de>2014-12-16 16:08:50 +0100
commit68ae882596524a2dde9da73283241b01d56375d5 (patch)
tree48aef9818758ca4886c31c1664c3e73f037a5633 /configs/P1022DS_36BIT_SPIFLASH_defconfig
parentb9206e61f3d87535ac4f4b0b858e674fd1edfeaf (diff)
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USB: gadget: atmel_usba_udc: fix transfer hang issue
When receive data, the RXRDY in status register set by hardware after a new packet has been stored in the endpoint FIFO. After, we copy from FIFO, we clear it, make the FIFO can be accessed again. In the receive_data() function, this bit RXRDY has been cleared. So, after the receive_data() function return, this bit should not be cleared again, or else it will cause the accessing FIFO corrupt, which will make the data loss. Signed-off-by: Bo Shen <voice.shen@atmel.com>
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