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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2014-11-13 20:31:51 +0900
committerScott Wood <scottwood@freescale.com>2014-11-26 19:53:22 -0600
commitf09eb52b3ffcc63b5bdaa5ca33f130491201f571 (patch)
treef3fcc47270b35ed6e23426c8542c950a3fb01ddb /configs/P1020RDB_36BIT_defconfig
parent65e4145a2093e6f80f19018f10a416bd02d0e816 (diff)
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mtd: denali: set some registers after nand_scan_ident()
Some but not all of implementations of the Denali NAND controller have hardware circuits to detect the device parameters such as page_size, erase_size, etc. Even on those SoCs with such hardware supported, the hardware is known to detect wrong parameters for some nasty (almost buggy) NAND devices. The device parameters detected during nand_scan_ident() are more trustworthy. This commit sets some hardware registers to mtd->pagesize, mtd->oobsize, etc. in the code between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com>
Diffstat (limited to 'configs/P1020RDB_36BIT_defconfig')
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