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authorJosh Marshall <josh.marshall@tecevo.com>2016-09-30 15:19:58 +1000
committerHans de Goede <hdegoede@redhat.com>2016-10-10 09:24:00 +0200
commit55cdcdaad3edb24779b76716d5cf9c36db2fed44 (patch)
tree9d240da5e00ee049f852031bfd320ca3d9a6aa3b /configs/A20-OLinuXino-Lime_defconfig
parent7c9454d4439ad4a9984394cbde77f0f8bc330d2c (diff)
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sunxi: OLinuXino Lime A20 boards: Use 384 MHz DRAM clock
We have a number of OlinuXino Lime2 boards (both NAND and eMMC versions) which were experiencing sporadic hangs. After testing with some heavy benchmarking and help from the Armbian forum, it was pinned down as the DRAM settings for the board. The default is 480MHz, but this is unstable, and even the build instructions from the vendor Olimex themselves say to set the DRAM clock to 384. See line 96 at: https://github.com/OLIMEX/OLINUXINO/blob/master/SOFTWARE/A20/A20-build-3.4.103-release-2/BUILD_DESCRIPTION_A20_Olimex_kernel_3.4.103%2B_Jessie_rel_2.txt Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'configs/A20-OLinuXino-Lime_defconfig')
-rw-r--r--configs/A20-OLinuXino-Lime_defconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index c4f6e1a..024dc2d 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
-CONFIG_DRAM_CLK=480
+CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set