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author | Suman Anna <s-anna@ti.com> | 2016-11-23 12:54:40 +0530 |
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committer | Tom Rini <trini@konsulko.com> | 2016-12-04 13:54:48 -0500 |
commit | fba82eb7c9eea2fcf5fa05c45cbec26c3410f9f3 (patch) | |
tree | 2c5ff32c2feba1b0fd5156ce8c266b02054f0b36 /cmd | |
parent | beb71279d865deb77b2faa86d7d1d180df8339a0 (diff) | |
download | u-boot-imx-fba82eb7c9eea2fcf5fa05c45cbec26c3410f9f3.zip u-boot-imx-fba82eb7c9eea2fcf5fa05c45cbec26c3410f9f3.tar.gz u-boot-imx-fba82eb7c9eea2fcf5fa05c45cbec26c3410f9f3.tar.bz2 |
ARM: DRA7: Redefine voltage and efuse macros per OPP using Kconfig
Redefine the macros used to define the voltage values and the
efuse register offsets based on OPP for all the voltage domains.
This is done using Kconfig macros that can be set in a defconfig
or selected during a config step. This allows a voltage domain
to be configured/set to a corresponding voltage value depending
on the OPP selection choice.
The Kconfig choices have been added for MPU, DSPEVE, IVA and GPU
voltage domains, with the MPU domain restricted to OPP_NOM. The
OPP_OD and OPP_HIGH options will be added when the support for
configuring the MPU clock frequency is added. The clock
configuration for other voltage domains is out of scope in
u-boot code.
The CORE voltage domain does not have separate voltage values
and efuse register offset at different OPPs, while the MPU
voltage domain only has different efuse register offsets for
different OPPs, but uses the same voltage value. Any different
choices of OPPs for voltage domains on common ganged-rails
is automatically taken care to select the corresponding
highest OPP voltage value.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'cmd')
0 files changed, 0 insertions, 0 deletions