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author | Stephen Warren <swarren@nvidia.com> | 2016-01-18 11:23:16 -0700 |
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committer | Tom Warren <twarren@nvidia.com> | 2016-01-28 10:32:31 -0700 |
commit | 7fb82986be6252acf5aa05ac1ba7225548134a18 (patch) | |
tree | 86a747443096f72ac98ff3a8a4da7e21a1b44e85 /cmd/tsi148.c | |
parent | b20c38a973a51bf3f663bd298c63ad1b8e0de445 (diff) | |
download | u-boot-imx-7fb82986be6252acf5aa05ac1ba7225548134a18.zip u-boot-imx-7fb82986be6252acf5aa05ac1ba7225548134a18.tar.gz u-boot-imx-7fb82986be6252acf5aa05ac1ba7225548134a18.tar.bz2 |
ARM: tegra: rm Jetson TK1 PMIC GPIO programming
The PMIC is configured such that its GPIOs have the correct configuration
at power-up, so no programming is required.
In fact, the current programming is actively wrong, since:
(a) the AS3722 driver configures the GPIO to be an output before setting
its output value, which causes a 0v glitch on the output.
(b) the AS3722 driver configures the GPIO to drive a high voltage from its
VSUP_GPIO power source rather than its VDD_GPIO_LV power source, so the pin
drives 5V not 1.8V as desired.
Solve these problems by removing the code which configures the PMIC GPIOs.
Note that this patch was tested directly on top of v2016.01; since then,
commit 96350f729c42 "dm: tegra: net: Convert tegra boards to driver model
for Ethernet" prevents PCIe from being initialized. Alternatively, simply
revert that commit to get PCIe Ethernet working again, then apply this
patch to test.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'cmd/tsi148.c')
0 files changed, 0 insertions, 0 deletions