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authorSimon Glass <sjg@chromium.org>2011-11-28 15:04:40 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-24 10:23:32 +0100
commitf46a945653146d62e8e8261f119642e302d704d2 (patch)
tree1d1a9953517c9c90729613d7e3825fbc824de63d /board
parentbb6997f8402a9074fc7a97c6fb4b892a4dcb095b (diff)
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tegra: Move boards over to use arch-level board UART function
Now that we can set up the UART in common tegra code, make the boards use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board')
-rw-r--r--board/avionic-design/common/tamonten.c50
-rw-r--r--board/nvidia/common/board.c76
2 files changed, 5 insertions, 121 deletions
diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c
index 98aa0f8..97e59fb 100644
--- a/board/avionic-design/common/tamonten.c
+++ b/board/avionic-design/common/tamonten.c
@@ -27,6 +27,7 @@
#include <ns16550.h>
#include <asm/io.h>
#include <asm/gpio.h>
+#include <asm/arch/board.h>
#include <asm/arch/tegra2.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/clk_rst.h>
@@ -55,44 +56,6 @@ int timer_init(void)
return 0;
}
-static void enable_uart(enum periph_id pid)
-{
- /* Assert UART reset and enable clock */
- reset_set_enable(pid, 1);
- clock_enable(pid);
- clock_ll_set_source(pid, 0); /* UARTx_CLK_SRC = 00, PLLP_OUT0 */
-
- /* wait for 2us */
- udelay(2);
-
- /* De-assert reset to UART */
- reset_set_enable(pid, 0);
-}
-
-/*
- * Routine: clock_init_uart
- * Description: init the PLL and clock for the UART(s)
- */
-static void clock_init_uart(void)
-{
-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
- enable_uart(PERIPH_ID_UART4);
-#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
-}
-
-/*
- * Routine: pin_mux_uart
- * Description: setup the pin muxes/tristate values for the UART(s)
- */
-static void pin_mux_uart(void)
-{
-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
- pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
-
- pinmux_tristate_disable(PINGRP_GMC);
-#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
-}
-
#ifdef CONFIG_TEGRA2_MMC
/*
* Routine: pin_mux_mmc
@@ -146,15 +109,8 @@ int board_mmc_init(bd_t *bd)
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
- /* Initialize essential common plls */
- clock_early_init();
-
- /* Initialize UART clocks */
- clock_init_uart();
-
- /* Initialize periph pinmuxes */
- pin_mux_uart();
-
+ /* Initialize selected UARTs */
+ board_init_uart_f();
return 0;
}
#endif /* EARLY_INIT */
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 0ff656a..e8253a0 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -27,6 +27,7 @@
#include <asm/arch/tegra2.h>
#include <asm/arch/sys_proto.h>
+#include <asm/arch/board.h>
#include <asm/arch/clk_rst.h>
#include <asm/arch/clock.h>
#include <asm/arch/pinmux.h>
@@ -36,13 +37,6 @@
DECLARE_GLOBAL_DATA_PTR;
-enum {
- /* UARTs which we can enable */
- UARTA = 1 << 0,
- UARTB = 1 << 1,
- UARTD = 1 << 3,
-};
-
const struct tegra2_sysinfo sysinfo = {
CONFIG_TEGRA2_BOARD_STRING
};
@@ -56,56 +50,6 @@ int timer_init(void)
return 0;
}
-static void enable_uart(enum periph_id pid)
-{
- /* Assert UART reset and enable clock */
- reset_set_enable(pid, 1);
- clock_enable(pid);
- clock_ll_set_source(pid, 0); /* UARTx_CLK_SRC = 00, PLLP_OUT0 */
-
- /* wait for 2us */
- udelay(2);
-
- /* De-assert reset to UART */
- reset_set_enable(pid, 0);
-}
-
-/*
- * Routine: clock_init_uart
- * Description: init clock for the UART(s)
- */
-static void clock_init_uart(int uart_ids)
-{
- if (uart_ids & UARTA)
- enable_uart(PERIPH_ID_UART1);
- if (uart_ids & UARTB)
- enable_uart(PERIPH_ID_UART2);
- if (uart_ids & UARTD)
- enable_uart(PERIPH_ID_UART4);
-}
-
-/*
- * Routine: pin_mux_uart
- * Description: setup the pin muxes/tristate values for the UART(s)
- */
-static void pin_mux_uart(int uart_ids)
-{
- if (uart_ids & UARTA) {
- pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
- pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
- pinmux_tristate_disable(PINGRP_IRRX);
- pinmux_tristate_disable(PINGRP_IRTX);
- }
- if (uart_ids & UARTB) {
- pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA);
- pinmux_tristate_disable(PINGRP_UAD);
- }
- if (uart_ids & UARTD) {
- pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
- pinmux_tristate_disable(PINGRP_GMC);
- }
-}
-
/*
* Routine: board_init
* Description: Early hardware init.
@@ -131,23 +75,7 @@ int board_init(void)
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
- int uart_ids = 0; /* bit mask of which UART ids to enable */
-
-#ifdef CONFIG_TEGRA2_ENABLE_UARTA
- uart_ids |= UARTA;
-#endif
-#ifdef CONFIG_TEGRA2_ENABLE_UARTB
- uart_ids |= UARTB;
-#endif
-#ifdef CONFIG_TEGRA2_ENABLE_UARTD
- uart_ids |= UARTD;
-#endif
-
- /* Initialize UART clocks */
- clock_init_uart(uart_ids);
-
- /* Initialize periph pinmuxes */
- pin_mux_uart(uart_ids);
+ board_init_uart_f();
/* Initialize periph GPIOs */
#ifdef CONFIG_SPI_UART_SWITCH