ppc4xx: remove DP405 board

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>

5 files changed, 0 insertions, 228 deletions

diff --git a/board/esd/dp405/Kconfig b/board/esd/dp405/Kconfig
deleted file mode 100644
index c0163ae..0000000
--- a/board/esd/dp405/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_DP405
-
-config SYS_BOARD
-	default "dp405"
-
-config SYS_VENDOR
-	default "esd"
-
-config SYS_CONFIG_NAME
-	default "DP405"
-
-endif
diff --git a/board/esd/dp405/MAINTAINERS b/board/esd/dp405/MAINTAINERS
deleted file mode 100644
index 6833d8c..0000000
--- a/board/esd/dp405/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-DP405 BOARD
-M:	Matthias Fuchs <matthias.fuchs@esd-electronics.com>
-S:	Maintained
-F:	board/esd/dp405/
-F:	include/configs/DP405.h
-F:	configs/DP405_defconfig
diff --git a/board/esd/dp405/Makefile b/board/esd/dp405/Makefile
deleted file mode 100644
index cfcfb66..0000000
--- a/board/esd/dp405/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-# Objects for Xilinx JTAG programming (CPLD)
-CPLD    = ../common/xilinx_jtag/lenval.o \
-	  ../common/xilinx_jtag/micro.o \
-	  ../common/xilinx_jtag/ports.o
-
-obj-y	= dp405.o flash.o ../common/misc.o $(CPLD)
diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c
deleted file mode 100644
index 730ff21..0000000
--- a/board/esd/dp405/dp405.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <command.h>
-#include <malloc.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f (void)
-{
-	/*
-	 * IRQ 0-15  405GP internally generated; active high; level sensitive
-	 * IRQ 16    405GP internally generated; active low; level sensitive
-	 * IRQ 17-24 RESERVED
-	 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
-	 * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
-	 * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
-	 * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
-	 * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
-	 * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
-	 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
-	 */
-	mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
-	mtdcr(UIC0ER, 0x00000000);       /* disable all ints */
-	mtdcr(UIC0CR, 0x00000000);       /* set all to be non-critical*/
-	mtdcr(UIC0PR, 0xFFFFFF80);       /* set int polarities */
-	mtdcr(UIC0TR, 0x10000000);       /* set int trigger levels */
-	mtdcr(UIC0VCR, 0x00000001);      /* set vect base=0,INT0 highest priority*/
-	mtdcr(UIC0SR, 0xFFFFFFFF);       /* clear all ints */
-
-	/*
-	 * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
-	 */
-	mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
-
-	/*
-	 * Reset CPLD via GPIO13 (CS4) pin
-	 */
-	out_be32((void *)GPIO0_OR,
-		 in_be32((void *)GPIO0_OR) & ~(0x80000000 >> 13));
-	udelay(1000); /* wait 1ms */
-	out_be32((void *)GPIO0_OR,
-		 in_be32((void *)GPIO0_OR) | (0x80000000 >> 13));
-	udelay(1000); /* wait 1ms */
-
-	return 0;
-}
-
-int misc_init_r (void)
-{
-	/* adjust flash start and offset */
-	gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
-	gd->bd->bi_flashoffset = 0;
-
-	return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-
-int checkboard (void)
-{
-	char str[64];
-	int i = getenv_f("serial#", str, sizeof(str));
-	unsigned char trans[16] = {0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe,
-				   0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf};
-	unsigned char id1, id2, rev;
-
-	puts ("Board: ");
-
-	if (i == -1)
-		puts ("### No HW ID - assuming DP405");
-	else
-		puts(str);
-
-	id1 = trans[(~(in_be32((void *)GPIO0_IR) >> 5)) & 0x0000000f];
-	id2 = trans[(~(in_be32((void *)GPIO0_IR) >> 9)) & 0x0000000f];
-
-	rev = in_8((void *)0xf0001000);
-	if (rev & 0x10) /* old DP405 compatibility */
-		rev = in_8((void *)0xf0000800);
-
-	switch (rev & 0xc0) {
-	case 0x00:
-		puts(" (HW=DP405");
-		break;
-	case 0x80:
-		puts(" (HW=DP405/CO");
-		break;
-	case 0xc0:
-		puts(" (HW=DN405");
-		break;
-	}
-	printf(", ID=0x%1X%1X, PLD=0x%02X", id2, id1, rev & 0x0f);
-
-	if ((rev & 0xc0) == 0xc0) {
-		printf(", C5V=%s",
-		       in_be32((void *)GPIO0_IR) & 0x40000000 ? "off" : "on");
-	}
-	puts(")\n");
-
-	return 0;
-}
diff --git a/board/esd/dp405/flash.c b/board/esd/dp405/flash.c
deleted file mode 100644
index 23e8164..0000000
--- a/board/esd/dp405/flash.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * (C) Copyright 2001
- * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/ppc4xx.h>
-#include <asm/processor.h>
-
-/*
- * include common flash code (for esd boards)
- */
-#include "../common/flash.c"
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-static ulong flash_get_size (vu_long * addr, flash_info_t * info);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-
-/*-----------------------------------------------------------------------
- */
-
-unsigned long flash_init (void)
-{
-	unsigned long size_b0;
-	int i;
-	uint pbcr;
-	unsigned long base_b0;
-	int size_val = 0;
-
-	/* Init: no FLASHes known */
-	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
-		flash_info[i].flash_id = FLASH_UNKNOWN;
-	}
-
-	/* Static FLASH Bank configuration here - FIXME XXX */
-
-	size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
-
-	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
-		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
-			size_b0, size_b0<<20);
-	}
-
-	/* Setup offsets */
-	flash_get_offsets (-size_b0, &flash_info[0]);
-
-	/* Re-do sizing to get full correct info */
-	mtdcr(EBC0_CFGADDR, PB0CR);
-	pbcr = mfdcr(EBC0_CFGDATA);
-	mtdcr(EBC0_CFGADDR, PB0CR);
-	base_b0 = -size_b0;
-	switch (size_b0) {
-	case 1 << 20:
-		size_val = 0;
-		break;
-	case 2 << 20:
-		size_val = 1;
-		break;
-	case 4 << 20:
-		size_val = 2;
-		break;
-	case 8 << 20:
-		size_val = 3;
-		break;
-	case 16 << 20:
-		size_val = 4;
-		break;
-	}
-	pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17);
-	mtdcr(EBC0_CFGDATA, pbcr);
-
-	/* Monitor protection ON by default */
-	(void)flash_protect(FLAG_PROTECT_SET,
-			    -CONFIG_SYS_MONITOR_LEN,
-			    0xffffffff,
-			    &flash_info[0]);
-
-	flash_info[0].size = size_b0;
-
-	return (size_b0);
-}