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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-06-04 10:26:47 +0900 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-06-05 17:01:58 -0400 |
| commit | 26bf6d77a6a19300d5d8126d87a40a105f8abcb1 (patch) | |
| tree | 63541054ba4b84c648aa5c6b44c0676ebcd4924f /board | |
| parent | ba8dd7755ea53bb04bf148fefe6e438cbe34f45b (diff) | |
| download | u-boot-imx-26bf6d77a6a19300d5d8126d87a40a105f8abcb1.zip u-boot-imx-26bf6d77a6a19300d5d8126d87a40a105f8abcb1.tar.gz u-boot-imx-26bf6d77a6a19300d5d8126d87a40a105f8abcb1.tar.bz2 | |
nand_spl: remove P1023RDS_NAND support
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/p1023rds/p1023rds.c | 5 | ||||
| -rw-r--r-- | board/freescale/p1023rds/tlb.c | 2 |
2 files changed, 0 insertions, 7 deletions
diff --git a/board/freescale/p1023rds/p1023rds.c b/board/freescale/p1023rds/p1023rds.c index d8c8745..2b883c7 100644 --- a/board/freescale/p1023rds/p1023rds.c +++ b/board/freescale/p1023rds/p1023rds.c @@ -182,11 +182,6 @@ void ft_board_setup(void *blob, bd_t *bd) fdt_fixup_memory(blob, (u64)base, (u64)size); - /* By default NOR is on, and NAND is disabled */ -#ifdef CONFIG_NAND_U_BOOT - do_fixup_by_path_string(blob, "nor_flash", "status", "disabled"); - do_fixup_by_path_string(blob, "nand_flash", "status", "okay"); -#endif #ifdef CONFIG_HAS_FSL_DR_USB fdt_fixup_dr_usb(blob, bd); #endif diff --git a/board/freescale/p1023rds/tlb.c b/board/freescale/p1023rds/tlb.c index 8b2bf50..3c92c14 100644 --- a/board/freescale/p1023rds/tlb.c +++ b/board/freescale/p1023rds/tlb.c @@ -36,7 +36,6 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_4M, 1), -#ifndef CONFIG_NAND_SPL /* *W*G* - BCSR and NOR flash on local bus*/ /* This will be changed to *I*G* after relocation to RAM. */ SET_TLB_ENTRY(1, CONFIG_SYS_BCSR_BASE, CONFIG_SYS_BCSR_BASE_PHYS, @@ -79,7 +78,6 @@ struct fsl_e_tlb_entry tlb_table[] = { CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 10, BOOKE_PAGESZ_1M, 1), -#endif /* *I*G - NAND */ SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS, |