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authorWolfgang Denk <wd@denx.de>2008-04-13 09:59:26 -0700
committerWolfgang Denk <wd@denx.de>2008-04-13 09:59:26 -0700
commit1aeed8d71acb3290cf2446f316d6ba437e7881c4 (patch)
tree475d54d2773652e6103291bfdd63d9c27b68a0a8 /board
parent8c8428a576f632745306e288b629e30d420c0f5a (diff)
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Coding Style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board')
-rw-r--r--board/MigoR/config.mk1
-rw-r--r--board/MigoR/lowlevel_init.S5
-rw-r--r--board/MigoR/migo_r.c1
-rw-r--r--board/MigoR/u-boot.lds1
-rw-r--r--board/freescale/m5275evb/mii.c8
-rw-r--r--board/mpr2/mpr2.c3
-rw-r--r--board/mpr2/u-boot.lds2
7 files changed, 6 insertions, 15 deletions
diff --git a/board/MigoR/config.mk b/board/MigoR/config.mk
index c68cb72..2c5085a 100644
--- a/board/MigoR/config.mk
+++ b/board/MigoR/config.mk
@@ -29,4 +29,3 @@
#
TEXT_BASE = 0x8FFC0000
-
diff --git a/board/MigoR/lowlevel_init.S b/board/MigoR/lowlevel_init.S
index 7fd771d..2ec8e04 100644
--- a/board/MigoR/lowlevel_init.S
+++ b/board/MigoR/lowlevel_init.S
@@ -42,7 +42,6 @@
.align 2
lowlevel_init:
-
mov.l CCR_A, r1 ! Address of Cache Control Register
mov.l CCR_D, r0 ! Instruction Cache Invalidate
mov.l r0, @r1
@@ -100,7 +99,6 @@ lowlevel_init:
mov.l r0, @r1
bsc_init:
-
mov.l CMNCR_A, r1 ! CMNCR address -> R1
mov.l CMNCR_D, r0 ! CMNCR data -> R0
mov.l r0, @r1 ! CMNCR set
@@ -188,8 +186,6 @@ bsc_init:
rts
mov #0, r0
-
-
.align 4
CCR_A: .long CCR
@@ -266,4 +262,3 @@ PSCR_D: .word 0x0000
RWTCSR_D_1: .word 0xA507
RWTCSR_D_2: .word 0xA504 ! 20080115
RWTCNT_D: .word 0x5A00
-
diff --git a/board/MigoR/migo_r.c b/board/MigoR/migo_r.c
index 53f4bb2..b31f37d 100644
--- a/board/MigoR/migo_r.c
+++ b/board/MigoR/migo_r.c
@@ -51,4 +51,3 @@ int dram_init (void)
void led_set_state (unsigned short value)
{
}
-
diff --git a/board/MigoR/u-boot.lds b/board/MigoR/u-boot.lds
index 1877b81..692bc62 100644
--- a/board/MigoR/u-boot.lds
+++ b/board/MigoR/u-boot.lds
@@ -103,4 +103,3 @@ SECTIONS
PROVIDE (_end = .);
}
-
diff --git a/board/freescale/m5275evb/mii.c b/board/freescale/m5275evb/mii.c
index bbc93f6..6c7ace9 100644
--- a/board/freescale/m5275evb/mii.c
+++ b/board/freescale/m5275evb/mii.c
@@ -50,11 +50,11 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
}
} else {
if (info->iobase == CFG_FEC0_IOBASE) {
- gpio->par_feci2c &= ~0x0F00;
- gpio->par_fec0hl &= ~0xC0;
+ gpio->par_feci2c &= ~0x0F00;
+ gpio->par_fec0hl &= ~0xC0;
} else {
- gpio->par_feci2c &= ~0x00A0;
- gpio->par_fec1hl &= ~0xC0;
+ gpio->par_feci2c &= ~0x00A0;
+ gpio->par_fec1hl &= ~0xC0;
}
}
diff --git a/board/mpr2/mpr2.c b/board/mpr2/mpr2.c
index 2ddb0c1..98557b4 100644
--- a/board/mpr2/mpr2.c
+++ b/board/mpr2/mpr2.c
@@ -67,7 +67,7 @@ int board_init(void)
/* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved */
__raw_writew(0x0000, PSELD); /* 0 00 00 00 00 00 00 00 0 */
-
+
/* OTH: (00) Other fuction
* GPO: (01) General Purpose Output
* GPI: (11) General Purpose Input
@@ -159,4 +159,3 @@ int dram_init(void)
printf("SDRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024));
return 0;
}
-
diff --git a/board/mpr2/u-boot.lds b/board/mpr2/u-boot.lds
index 6fee7f2..eda6b44 100644
--- a/board/mpr2/u-boot.lds
+++ b/board/mpr2/u-boot.lds
@@ -7,7 +7,7 @@
*
* Copyright (C) 2008
* Mark Jonas <mark.jonas@de.bosch.com>
- *
+ *
* See file CREDITS for list of people who contributed to this
* project.
*