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authorMatthias Ludwig <mludwig@ultratronik.de>2009-05-19 09:09:31 +0200
committerWolfgang Denk <wd@denx.de>2009-08-07 23:31:51 +0200
commit187af954cf7958c24efcf0fd62289bbdb4f1f24e (patch)
tree7ad4bfe95128e7a7907ad8aa537817287e6cd69d /board
parentcb32ed1fc298875845f166d326a3f2704a0d5364 (diff)
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omap3: embedd gpmc_cs into gpmc config struct
Embedd chip select configuration into struct for gpmc config instead of having it completely separated as suggested by Wolfgang Denk on http://lists.denx.de/pipermail/u-boot/2009-May/052247.html Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Diffstat (limited to 'board')
-rw-r--r--board/omap3/evm/evm.c16
-rw-r--r--board/omap3/zoom2/zoom2.c14
2 files changed, 13 insertions, 17 deletions
diff --git a/board/omap3/evm/evm.c b/board/omap3/evm/evm.c
index bfd2688..1f9cf32 100644
--- a/board/omap3/evm/evm.c
+++ b/board/omap3/evm/evm.c
@@ -93,17 +93,17 @@ void set_muxconf_regs(void)
static void setup_net_chip(void)
{
gpio_t *gpio3_base = (gpio_t *)OMAP34XX_GPIO3_BASE;
- gpmc_csx_t *gpmc_cs5_base = (gpmc_csx_t *)GPMC_CONFIG_CS5_BASE;
+ gpmc_t *gpmc = (gpmc_t *)GPMC_BASE;
ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
/* Configure GPMC registers */
- writel(NET_GPMC_CONFIG1, &gpmc_cs5_base->config1);
- writel(NET_GPMC_CONFIG2, &gpmc_cs5_base->config2);
- writel(NET_GPMC_CONFIG3, &gpmc_cs5_base->config3);
- writel(NET_GPMC_CONFIG4, &gpmc_cs5_base->config4);
- writel(NET_GPMC_CONFIG5, &gpmc_cs5_base->config5);
- writel(NET_GPMC_CONFIG6, &gpmc_cs5_base->config6);
- writel(NET_GPMC_CONFIG7, &gpmc_cs5_base->config7);
+ writel(NET_GPMC_CONFIG1, &gpmc->cs[5].config1);
+ writel(NET_GPMC_CONFIG2, &gpmc->cs[5].config2);
+ writel(NET_GPMC_CONFIG3, &gpmc->cs[5].config3);
+ writel(NET_GPMC_CONFIG4, &gpmc->cs[5].config4);
+ writel(NET_GPMC_CONFIG5, &gpmc->cs[5].config5);
+ writel(NET_GPMC_CONFIG6, &gpmc->cs[5].config6);
+ writel(NET_GPMC_CONFIG7, &gpmc->cs[5].config7);
/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
diff --git a/board/omap3/zoom2/zoom2.c b/board/omap3/zoom2/zoom2.c
index 94a985d..2fab98e 100644
--- a/board/omap3/zoom2/zoom2.c
+++ b/board/omap3/zoom2/zoom2.c
@@ -50,8 +50,8 @@
* The details of the setting of the serial gpmc setup are not available.
* The values were provided by another party.
*/
-extern void enable_gpmc_config(u32 *gpmc_config, gpmc_csx_t *gpmc_cs_base,
- u32 base, u32 size);
+void enable_gpmc_cs_config(u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
+ u32 size);
static u32 gpmc_serial_TL16CP754C[GPMC_MAX_REG] = {
0x00011000,
@@ -123,19 +123,15 @@ void zoom2_identify(void)
int board_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
- gpmc_csx_t *serial_cs_base;
+ gpmc_t *gpmc = (gpmc_t *)GPMC_BASE;
u32 *gpmc_config;
gpmc_init (); /* in SRAM or SDRAM, finish GPMC */
/* Configure console support on zoom2 */
gpmc_config = gpmc_serial_TL16CP754C;
- serial_cs_base = (gpmc_csx_t *) (GPMC_CONFIG_CS0_BASE +
- (3 * GPMC_CONFIG_WIDTH));
- enable_gpmc_config(gpmc_config,
- serial_cs_base,
- SERIAL_TL16CP754C_BASE,
- GPMC_SIZE_16M);
+ enable_gpmc_cs_config(gpmc_config, &gpmc->cs[4],
+ SERIAL_TL16CP754C_BASE, GPMC_SIZE_16M);
/* board id for Linux */
gd->bd->bi_arch_number = MACH_TYPE_OMAP_ZOOM2;