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| author | Mingkai Hu <Mingkai.hu@freescale.com> | 2015-12-07 16:58:54 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-12-17 08:52:18 +0800 |
| commit | 0d6faf2bd0d12642e8b2c428d62c285f4ee28b9d (patch) | |
| tree | fbc4357334745cbdccb55e406e147f8d8789cec8 /board | |
| parent | 2949ae521200ae5758ae395a364fcb4e85f899c0 (diff) | |
| download | u-boot-imx-0d6faf2bd0d12642e8b2c428d62c285f4ee28b9d.zip u-boot-imx-0d6faf2bd0d12642e8b2c428d62c285f4ee28b9d.tar.gz u-boot-imx-0d6faf2bd0d12642e8b2c428d62c285f4ee28b9d.tar.bz2 | |
armv8/ls1043a: Implement workaround for PEX erratum A009929
Consecutive write transactions from core to PCI express outbound
path hangs after 25 to 30 transactions depending on core freq.
This erratum enable the mbist clock through COP register setting.
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board')
0 files changed, 0 insertions, 0 deletions