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authorYe.Li <B37916@freescale.com>2014-06-09 11:31:34 +0800
committerYe.Li <B37916@freescale.com>2014-06-17 11:13:49 +0800
commit0b67ab303873c6e3be0e8cc83175efd740c94c5c (patch)
tree084448d0359fccb1a3f6de0b61c3accc6325d58e /board
parentc7a021781b4913349d13964d628d4f6e79039714 (diff)
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ENGR00315894-40 i.mx6dl: arm2: add the i.MX6DL arm2 board support
This patch adds the i.MX6DL arm2 board support. The i.MX6DL ARM2 shared the same board with i.MX6Q ARM2 board since the i.MX6DL is pin-pin compatible with i.MX6Q. The patch also support the DDR 32-BIT mode option. Please define CONFIG_DDR_32BIT in the board configure file to enable DDR 32-BIT mode.But due to the board design, it's 64bit DDR buswidth physically, so, if you CONFIG_DDR_32BIT, the DDR memory size will be half of it. The patch has been tested on the i.MX6Q and i.MX6DL arm2 board. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/mx6qarm2/imximage_mx6dl.cfg174
-rw-r--r--board/freescale/mx6qarm2/plugin.S205
2 files changed, 379 insertions, 0 deletions
diff --git a/board/freescale/mx6qarm2/imximage_mx6dl.cfg b/board/freescale/mx6qarm2/imximage_mx6dl.cfg
new file mode 100644
index 0000000..bb9ae4c
--- /dev/null
+++ b/board/freescale/mx6qarm2/imximage_mx6dl.cfg
@@ -0,0 +1,174 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Jason Liu <r64343@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License or DATA 4.at your option any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not write to the Free Software
+ * Foundation Inc. 51 Franklin Street Fifth Floor Boston,
+ * MA 02110-1301 USA
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+#define __ASSEMBLY__
+#include <config.h>
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd DATA 4.the board has no nand neither onenand
+ */
+
+BOOT_FROM sd
+
+#ifdef CONFIG_USE_PLUGIN
+/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
+PLUGIN board/freescale/mx6qarm2/plugin.bin 0x00907000
+#else
+
+#ifdef CONFIG_SECURE_BOOT
+CSF 0x2000
+#endif
+
+/*
+ * Device Configuration Data DATA 4.DCD
+ *
+ * Each entry must have the format:
+ * Addr-type Address Value
+ *
+ * where:
+ * Addr-type register length DATA 4.1,2 or 4 bytes
+ * Address absolute address of the register
+ * value value to be stored in the register
+ */
+DATA 4 0x020e0798 0x000c0000
+DATA 4 0x020e0758 0x00000000
+DATA 4 0x020e0588 0x00000030
+DATA 4 0x020e0594 0x00000030
+DATA 4 0x020e056c 0x00000030
+DATA 4 0x020e0578 0x00000030
+DATA 4 0x020e074c 0x00000030
+DATA 4 0x020e057c 0x00000030
+DATA 4 0x020e0590 0x00003000
+DATA 4 0x020e0598 0x00003000
+DATA 4 0x020e058c 0x00000000
+DATA 4 0x020e059c 0x00003030
+DATA 4 0x020e05a0 0x00003030
+DATA 4 0x020e078c 0x00000030
+DATA 4 0x020e0750 0x00020000
+DATA 4 0x020e05a8 0x00000030
+DATA 4 0x020e05b0 0x00000030
+DATA 4 0x020e0524 0x00000030
+DATA 4 0x020e051c 0x00000030
+DATA 4 0x020e0518 0x00000030
+DATA 4 0x020e050c 0x00000030
+DATA 4 0x020e05b8 0x00000030
+DATA 4 0x020e05c0 0x00000030
+DATA 4 0x020e0774 0x00020000
+DATA 4 0x020e0784 0x00000030
+DATA 4 0x020e0788 0x00000030
+DATA 4 0x020e0794 0x00000030
+DATA 4 0x020e079c 0x00000030
+DATA 4 0x020e07a0 0x00000030
+DATA 4 0x020e07a4 0x00000030
+DATA 4 0x020e07a8 0x00000030
+DATA 4 0x020e0748 0x00000030
+DATA 4 0x020e05ac 0x00000030
+DATA 4 0x020e05b4 0x00000030
+DATA 4 0x020e0528 0x00000030
+DATA 4 0x020e0520 0x00000030
+DATA 4 0x020e0514 0x00000030
+DATA 4 0x020e0510 0x00000030
+DATA 4 0x020e05bc 0x00000030
+DATA 4 0x020e05c4 0x00000030
+
+DATA 4 0x021b0800 0xa1390003
+DATA 4 0x021b4800 0xa1390003
+DATA 4 0x021b080c 0x001F001F
+DATA 4 0x021b0810 0x001F001F
+DATA 4 0x021b480c 0x00370037
+DATA 4 0x021b4810 0x00370037
+DATA 4 0x021b083c 0x422f0220
+DATA 4 0x021b0840 0x021f0219
+DATA 4 0x021b483C 0x422f0220
+DATA 4 0x021b4840 0x022d022f
+DATA 4 0x021b0848 0x47494b49
+DATA 4 0x021b4848 0x48484c47
+DATA 4 0x021b0850 0x39382b2f
+DATA 4 0x021b4850 0x2f35312c
+DATA 4 0x021b081c 0x33333333
+DATA 4 0x021b0820 0x33333333
+DATA 4 0x021b0824 0x33333333
+DATA 4 0x021b0828 0x33333333
+DATA 4 0x021b481c 0x33333333
+DATA 4 0x021b4820 0x33333333
+DATA 4 0x021b4824 0x33333333
+DATA 4 0x021b4828 0x33333333
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b48b8 0x00000800
+DATA 4 0x021b0004 0x0002002d
+DATA 4 0x021b0008 0x00333030
+
+DATA 4 0x021b000c 0x40445323
+DATA 4 0x021b0010 0xb66e8c63
+
+DATA 4 0x021b0014 0x01ff00db
+DATA 4 0x021b0018 0x00081740
+DATA 4 0x021b001c 0x00008000
+DATA 4 0x021b002c 0x000026d2
+DATA 4 0x021b0030 0x00440e21
+#ifdef CONFIG_DDR_32BIT
+DATA 4 0x021b0040 0x00000017
+DATA 4 0x021b0000 0xc3190000
+#else
+DATA 4 0x021b0040 0x00000027
+DATA 4 0x021b0000 0xc31a0000
+#endif
+DATA 4 0x021b001c 0x04008032
+DATA 4 0x021b001c 0x0400803a
+DATA 4 0x021b001c 0x00008033
+DATA 4 0x021b001c 0x0000803b
+DATA 4 0x021b001c 0x00428031
+DATA 4 0x021b001c 0x00428039
+DATA 4 0x021b001c 0x07208030
+DATA 4 0x021b001c 0x07208038
+DATA 4 0x021b001c 0x04008040
+DATA 4 0x021b001c 0x04008048
+DATA 4 0x021b0020 0x00005800
+DATA 4 0x021b0818 0x00000007
+DATA 4 0x021b4818 0x00000007
+DATA 4 0x021b0004 0x0002556d
+DATA 4 0x021b4004 0x00011006
+DATA 4 0x021b001c 0x00000000
+
+DATA 4 0x020c4068 0x00C03F3F
+DATA 4 0x020c406c 0x0030FC03
+DATA 4 0x020c4070 0x0FFFC000
+DATA 4 0x020c4074 0x3FF00000
+DATA 4 0x020c4078 0x00FFF300
+DATA 4 0x020c407c 0x0F0000C3
+DATA 4 0x020c4080 0x000003FF
+
+DATA 4 0x020e0010 0xF00000CF
+DATA 4 0x020e0018 0x007F007F
+DATA 4 0x020e001c 0x007F007F
+#endif
diff --git a/board/freescale/mx6qarm2/plugin.S b/board/freescale/mx6qarm2/plugin.S
index 08a14c4..e553d7e 100644
--- a/board/freescale/mx6qarm2/plugin.S
+++ b/board/freescale/mx6qarm2/plugin.S
@@ -8,6 +8,209 @@
#include <config.h>
+.macro imx6dlarm2_ddr_setting
+ ldr r0, =CCM_BASE_ADDR
+ ldr r1, =0xffffffff
+ str r1, [r0, #0x068]
+ ldr r1, =0xffffffff
+ str r1, [r0, #0x06c]
+ ldr r1, =0xffffffff
+ str r1, [r0, #0x070]
+ ldr r1, =0xffffffff
+ str r1, [r0, #0x074]
+ ldr r1, =0xffffffff
+ str r1, [r0, #0x078]
+ ldr r1, =0xffffffff
+ str r1, [r0, #0x07c]
+ ldr r1, =0xffffffff
+ str r1, [r0, #0x080]
+ ldr r1, =0xffffffff
+ str r1, [r0, #0x084]
+
+ ldr r0, =IOMUXC_BASE_ADDR
+ ldr r1, =0x000c0000
+ str r1, [r0, #0x798]
+ ldr r1, =0x00000000
+ str r1, [r0, #0x758]
+
+ ldr r1, =0x00000030
+ str r1, [r0, #0x588]
+ str r1, [r0, #0x594]
+ str r1, [r0, #0x56c]
+ str r1, [r0, #0x578]
+ str r1, [r0, #0x74c]
+ str r1, [r0, #0x57c]
+
+ ldr r1, =0x00003000
+ str r1, [r0, #0x590]
+ str r1, [r0, #0x598]
+
+ ldr r1, =0x00000000
+ str r1, [r0, #0x58c]
+
+ ldr r1, =0x00003030
+ str r1, [r0, #0x59c]
+ str r1, [r0, #0x5a0]
+
+ ldr r1, =0x00000030
+ str r1, [r0, #0x78c]
+
+ ldr r1, =0x00020000
+ str r1, [r0, #0x750]
+
+ ldr r1, =0x00000030
+ str r1, [r0, #0x5a8]
+ str r1, [r0, #0x5b0]
+ str r1, [r0, #0x524]
+ str r1, [r0, #0x51c]
+ str r1, [r0, #0x518]
+ str r1, [r0, #0x50c]
+ str r1, [r0, #0x5b8]
+ str r1, [r0, #0x5c0]
+
+ ldr r1, =0x00020000
+ str r1, [r0, #0x774]
+
+ ldr r1, =0x00000030
+ str r1, [r0, #0x784]
+ str r1, [r0, #0x788]
+ str r1, [r0, #0x794]
+ str r1, [r0, #0x79c]
+ str r1, [r0, #0x7a0]
+ str r1, [r0, #0x7a4]
+ str r1, [r0, #0x7a8]
+ str r1, [r0, #0x748]
+ str r1, [r0, #0x5ac]
+ str r1, [r0, #0x5b4]
+ str r1, [r0, #0x528]
+ str r1, [r0, #0x520]
+ str r1, [r0, #0x514]
+ str r1, [r0, #0x510]
+ str r1, [r0, #0x5bc]
+ str r1, [r0, #0x5c4]
+
+ ldr r0, =MMDC_P0_BASE_ADDR
+ ldr r1, =MMDC_P1_BASE_ADDR
+ ldr r2, =0xa1390003
+ str r2, [r0, #0x800]
+ str r2, [r1, #0x800]
+
+ ldr r2, =0x001F001F
+ str r2, [r0, #0x80c]
+ str r2, [r0, #0x810]
+
+ ldr r2, =0x00370037
+ str r2, [r1, #0x80c]
+ str r2, [r1, #0x810]
+
+ ldr r2, =0x422f0220
+ str r2, [r0, #0x83c]
+ ldr r2, =0x021f0219
+ str r2, [r0, #0x840]
+
+ ldr r2, =0x422f0220
+ str r2, [r1, #0x83c]
+ ldr r2, =0x022d022f
+ str r2, [r1, #0x840]
+
+ ldr r2, =0x47494b49
+ str r2, [r0, #0x848]
+ ldr r2, =0x48484c47
+ str r2, [r1, #0x848]
+
+ ldr r2, =0x39382b2f
+ str r2, [r0, #0x850]
+ ldr r2, =0x2f35312c
+ str r2, [r1, #0x850]
+
+ ldr r2, =0x33333333
+ str r2, [r0, #0x81c]
+ str r2, [r0, #0x820]
+ str r2, [r0, #0x824]
+ str r2, [r0, #0x828]
+ str r2, [r1, #0x81c]
+ str r2, [r1, #0x820]
+ str r2, [r1, #0x824]
+ str r2, [r1, #0x828]
+
+ ldr r2, =0x00000800
+ str r2, [r0, #0x8b8]
+ ldr r2, =0x00000800
+ str r2, [r1, #0x8b8]
+
+ ldr r2, =0x0002002d
+ str r2, [r0, #0x004]
+ ldr r2, =0x00333030
+ str r2, [r0, #0x008]
+ ldr r2, =0x40445323
+ str r2, [r0, #0x00c]
+ ldr r2, =0xb66e8c63
+ str r2, [r0, #0x010]
+ ldr r2, =0x01ff00db
+ str r2, [r0, #0x014]
+ ldr r2, =0x00081740
+ str r2, [r0, #0x018]
+
+ ldr r2, =0x00008000
+ str r2, [r0, #0x01c]
+
+ ldr r2, =0x000026d2
+ str r2, [r0, #0x02c]
+ ldr r2, =0x00440e21
+ str r2, [r0, #0x030]
+
+#ifdef CONFIG_DDR_32BIT
+ ldr r2, =0x00000017
+ str r2, [r0, #0x040]
+ ldr r2, =0xc3190000
+ str r2, [r0, #0x000]
+#else
+ ldr r2, =0x00000027
+ str r2, [r0, #0x040]
+ ldr r2, =0xc31a0000
+ str r2, [r0, #0x000]
+#endif
+
+ ldr r2, =0x04008032
+ str r2, [r0, #0x01c]
+ ldr r2, =0x0400803a
+ str r2, [r0, #0x01c]
+
+ ldr r2, =0x00008033
+ str r2, [r0, #0x01c]
+ ldr r2, =0x0000803b
+ str r2, [r0, #0x01c]
+
+ ldr r2, =0x00428031
+ str r2, [r0, #0x01c]
+ ldr r2, =0x00428039
+ str r2, [r0, #0x01c]
+
+ ldr r2, =0x07208030
+ str r2, [r0, #0x01c]
+ ldr r2, =0x07208038
+ str r2, [r0, #0x01c]
+
+ ldr r2, =0x04008040
+ str r2, [r0, #0x01c]
+ ldr r2, =0x04008048
+ str r2, [r0, #0x01c]
+
+ ldr r2, =0x00005800
+ str r2, [r0, #0x020]
+
+ ldr r2, =0x00000007
+ str r2, [r0, #0x818]
+ str r2, [r1, #0x818]
+
+ ldr r2, =0x0002556d
+ str r2, [r0, #0x004]
+ ldr r2, =0x00011006
+ str r2, [r1, #0x004]
+ ldr r2, =0x00000000
+ str r2, [r0, #0x01c]
+.endm
+
.macro imx6dqarm2_ddr_setting
ldr r0, =CCM_BASE_ADDR
ldr r1, =0xffffffff
@@ -244,6 +447,8 @@
.macro imx6_ddr_setting
#if defined (CONFIG_MX6Q)
imx6dqarm2_ddr_setting
+ #elif defined (CONFIG_MX6DL)
+ imx6dlarm2_ddr_setting
#else
#error "SOC not configured"
#endif