summaryrefslogtreecommitdiff
path: root/board/v38b/v38b.c
diff options
context:
space:
mode:
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/v38b/v38b.c
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
downloadu-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip
u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz
u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/v38b/v38b.c')
-rw-r--r--board/v38b/v38b.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/board/v38b/v38b.c b/board/v38b/v38b.c
index 8815a0c..d774295 100644
--- a/board/v38b/v38b.c
+++ b/board/v38b/v38b.c
@@ -29,7 +29,7 @@
#include <asm/processor.h>
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
static void sdram_start(int hi_addr)
{
long hi_addr_bit = hi_addr ? 0x01000000 : 0;
@@ -68,7 +68,7 @@ static void sdram_start(int hi_addr)
*(vu_long *) MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
__asm__ volatile ("sync");
}
-#endif /* !CFG_RAMBOOT */
+#endif /* !CONFIG_SYS_RAMBOOT */
phys_size_t initdram(int board_type)
@@ -77,7 +77,7 @@ phys_size_t initdram(int board_type)
ulong dramsize2 = 0;
uint svr, pvr;
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
ulong test1, test2;
/* setup SDRAM chip selects */
@@ -98,9 +98,9 @@ phys_size_t initdram(int board_type)
/* find RAM size using SDRAM CS0 only */
sdram_start(0);
- test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+ test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
sdram_start(1);
- test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+ test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
if (test1 > test2) {
sdram_start(0);
dramsize = test1;
@@ -123,10 +123,10 @@ phys_size_t initdram(int board_type)
/* find RAM size using SDRAM CS1 only */
if (!dramsize)
sdram_start(0);
- test2 = test1 = get_ram_size((long *) (CFG_SDRAM_BASE + dramsize), 0x80000000);
+ test2 = test1 = get_ram_size((long *) (CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
if (!dramsize) {
sdram_start(1);
- test2 = get_ram_size((long *) (CFG_SDRAM_BASE + dramsize), 0x80000000);
+ test2 = get_ram_size((long *) (CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
}
if (test1 > test2) {
sdram_start(0);
@@ -145,7 +145,7 @@ phys_size_t initdram(int board_type)
else
*(vu_long *) MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
-#else /* CFG_RAMBOOT */
+#else /* CONFIG_SYS_RAMBOOT */
/* retrieve size of memory connected to SDRAM CS0 */
dramsize = *(vu_long *) MPC5XXX_SDRAM_CS0CFG & 0xFF;
@@ -161,7 +161,7 @@ phys_size_t initdram(int board_type)
else
dramsize2 = 0;
-#endif /* CFG_RAMBOOT */
+#endif /* CONFIG_SYS_RAMBOOT */
/*
* On MPC5200B we need to set the special configuration delay in the