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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-01-06 08:49:58 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-01-06 08:49:58 +0100 |
| commit | a891601ce51edbafa1a2750c96a618e4fcbca1c2 (patch) | |
| tree | 9a5d44eb1fcca45dfd30557318f786b66392a8f3 /board/udoo/1066mhz_4x256mx16.cfg | |
| parent | 2931fa4db349c97f882ffda42e901208654b5ca9 (diff) | |
| parent | 4611d5bab26f93471b84f6f33967cef69b3f723a (diff) | |
| download | u-boot-imx-a891601ce51edbafa1a2750c96a618e4fcbca1c2.zip u-boot-imx-a891601ce51edbafa1a2750c96a618e4fcbca1c2.tar.gz u-boot-imx-a891601ce51edbafa1a2750c96a618e4fcbca1c2.tar.bz2 | |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
include/micrel.h
The conflict above was trivial, caused by four lines being
added in both branches with different whitepace.
Diffstat (limited to 'board/udoo/1066mhz_4x256mx16.cfg')
| -rw-r--r-- | board/udoo/1066mhz_4x256mx16.cfg | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/board/udoo/1066mhz_4x256mx16.cfg b/board/udoo/1066mhz_4x256mx16.cfg new file mode 100644 index 0000000..1ac0aec --- /dev/null +++ b/board/udoo/1066mhz_4x256mx16.cfg @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 + +DATA 4, MX6_MMDC_P0_MDCFG0, 0x54597955 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xFF328F64 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB + +DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 + +DATA 4, MX6_MMDC_P0_MDOR, 0x00591023 +DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 +DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 + +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 + +DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x09408030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1380003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1380003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00011117 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00011117 + +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43510360 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x0342033F +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x033F033F +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03290266 + +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4B3E4141 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x47413B4A +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x42404843 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4C3F4C45 + +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x00350035 +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00010001 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00010001 + +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 + |