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authorMarcel Ziswiler <marcel@ziswiler.com>2015-03-26 01:31:53 +0100
committerTom Warren <twarren@nvidia.com>2015-03-30 10:04:43 -0700
commitd1db97aaa43d6ae5e1e790e872f79d36d8809660 (patch)
tree136786e754ffd0e7407d6abc39e70ae13c062cbc /board/toradex
parent37220efab846ece7cdfc7a8fba3d8294adc6093d (diff)
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ARM: tegra: get rid of colibri_t20-common
As a preparatory step to renaming the board folder as well first get rid of the colibri_t20-common after having integrated it into colibri_t20_iris for now. While at it also migrate to using NVIDIA's common.mk magic. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/toradex')
-rw-r--r--board/toradex/colibri_t20-common/colibri_t20-common.c35
-rw-r--r--board/toradex/colibri_t20-common/colibri_t20-common.h7
-rw-r--r--board/toradex/colibri_t20_iris/Makefile4
-rw-r--r--board/toradex/colibri_t20_iris/colibri_t20_iris.c42
4 files changed, 31 insertions, 57 deletions
diff --git a/board/toradex/colibri_t20-common/colibri_t20-common.c b/board/toradex/colibri_t20-common/colibri_t20-common.c
deleted file mode 100644
index 58a9916..0000000
--- a/board/toradex/colibri_t20-common/colibri_t20-common.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (C) 2012 Lucas Stach
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/funcmux.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch-tegra/board.h>
-
-#include "colibri_t20-common.h"
-
-#ifdef CONFIG_USB_EHCI_TEGRA
-void colibri_t20_common_pin_mux_usb(void)
-{
- /* module internal USB bus to connect ethernet chipset */
- funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
- /* ULPI reference clock output */
- pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
- pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
- /* PHY reset GPIO */
- pinmux_tristate_disable(PMUX_PINGRP_UAC);
- /* VBus GPIO */
- pinmux_tristate_disable(PMUX_PINGRP_DTE);
-}
-#endif
-
-#ifdef CONFIG_TEGRA_NAND
-void pin_mux_nand(void)
-{
- funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
-}
-#endif
diff --git a/board/toradex/colibri_t20-common/colibri_t20-common.h b/board/toradex/colibri_t20-common/colibri_t20-common.h
deleted file mode 100644
index 1fe53f6..0000000
--- a/board/toradex/colibri_t20-common/colibri_t20-common.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/*
- * Copyright (C) 2012 Lucas Stach
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-void colibri_t20_common_pin_mux_usb(void);
diff --git a/board/toradex/colibri_t20_iris/Makefile b/board/toradex/colibri_t20_iris/Makefile
index ebeac70..f286aec 100644
--- a/board/toradex/colibri_t20_iris/Makefile
+++ b/board/toradex/colibri_t20_iris/Makefile
@@ -4,6 +4,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y := ../../nvidia/common/board.o
-obj-y += ../colibri_t20-common/colibri_t20-common.o
+include $(srctree)/board/nvidia/common/common.mk
+
obj-y += colibri_t20_iris.o
diff --git a/board/toradex/colibri_t20_iris/colibri_t20_iris.c b/board/toradex/colibri_t20_iris/colibri_t20_iris.c
index 49c74f3..4656094 100644
--- a/board/toradex/colibri_t20_iris/colibri_t20_iris.c
+++ b/board/toradex/colibri_t20_iris/colibri_t20_iris.c
@@ -5,23 +5,11 @@
*/
#include <common.h>
-#include <asm/gpio.h>
#include <asm/arch/clock.h>
#include <asm/arch/funcmux.h>
#include <asm/arch/pinmux.h>
#include <asm/arch-tegra/board.h>
-
-#include "../colibri_t20-common/colibri_t20-common.h"
-
-#ifdef CONFIG_USB_EHCI_TEGRA
-void pin_mux_usb(void)
-{
- colibri_t20_common_pin_mux_usb();
-
- /* USB 1 aka Tegra USB port 3 VBus*/
- pinmux_tristate_disable(PMUX_PINGRP_SPIG);
-}
-#endif
+#include <asm/gpio.h>
#ifdef CONFIG_TEGRA_MMC
/*
@@ -34,3 +22,31 @@ void pin_mux_mmc(void)
pinmux_tristate_disable(PMUX_PINGRP_GMB);
}
#endif
+
+#ifdef CONFIG_TEGRA_NAND
+void pin_mux_nand(void)
+{
+ funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
+}
+#endif
+
+#ifdef CONFIG_USB_EHCI_TEGRA
+void pin_mux_usb(void)
+{
+ /* module internal USB bus to connect ethernet chipset */
+ funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
+
+ /* ULPI reference clock output */
+ pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
+ pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
+
+ /* PHY reset GPIO */
+ pinmux_tristate_disable(PMUX_PINGRP_UAC);
+
+ /* VBus GPIO */
+ pinmux_tristate_disable(PMUX_PINGRP_DTE);
+
+ /* USB 1 aka Tegra USB port 3 VBus */
+ pinmux_tristate_disable(PMUX_PINGRP_SPIG);
+}
+#endif