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| author | Nishanth Menon <nm@ti.com> | 2014-12-18 15:28:35 -0600 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2015-01-05 15:13:45 -0500 |
| commit | 38e5a5abda3bbbfd8aca7ed65a5354ee6709fb12 (patch) | |
| tree | c55976622218873209483136ee4a4d6cd74ec25e /board/ti/panda/panda.c | |
| parent | b31079282e16c77f6f8878999867c7d622ececae (diff) | |
| download | u-boot-imx-38e5a5abda3bbbfd8aca7ed65a5354ee6709fb12.zip u-boot-imx-38e5a5abda3bbbfd8aca7ed65a5354ee6709fb12.tar.gz u-boot-imx-38e5a5abda3bbbfd8aca7ed65a5354ee6709fb12.tar.bz2 | |
ARM: OMAP4: Panda: rework DMM logic
Part of DMM logic is reuse from commit
47a4bea6af77b01d59a410d09a4c34b2dd14cf50 ("ARM: omap4: Update sdram
setting for panda rev A6") Which broke SDP4430 with ES2.3 (uses old
DDR).
So, to maintain support for newer DDR used in Panda ES rev B3, we
should, in addition to the commit
675cc77a3ae45e8b0ec17128563264d4a509f628 ("ARM:OMAP4+: panda-es: Support
Rev B3 Elpida DDR2 RAM"), DDR timings, also do DMM configuration
specific to Panda.
Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'board/ti/panda/panda.c')
| -rw-r--r-- | board/ti/panda/panda.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c index 16368cb..783ba35 100644 --- a/board/ti/panda/panda.c +++ b/board/ti/panda/panda.c @@ -180,6 +180,22 @@ void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) else *regs = &emif_regs_elpida_400_mhz_1cs; } + +void emif_get_dmm_regs(const struct dmm_lisa_map_regs + **dmm_lisa_regs) +{ + u32 omap_rev = omap_revision(); + + if (omap_rev == OMAP4430_ES1_0) + *dmm_lisa_regs = &lisa_map_2G_x_1_x_2; + else if (omap_rev == OMAP4430_ES2_3) + *dmm_lisa_regs = &lisa_map_2G_x_2_x_2; + else if (omap_rev < OMAP4460_ES1_0) + *dmm_lisa_regs = &lisa_map_2G_x_2_x_2; + else + *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2; +} + #endif /** |