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| author | robertcnelson@gmail.com <robertcnelson@gmail.com> | 2012-01-27 07:09:42 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-02-12 10:11:23 +0100 |
| commit | 223b8aa42c0f4bf9b4a7a71c16d0f67b5faf5045 (patch) | |
| tree | 0b112e4d88531679bf01d367baf7a6e57dbaef7b /board/ti/beagle | |
| parent | 10f3bdd36e328b0bf4f8065e2d650dd8e9fa7976 (diff) | |
| download | u-boot-imx-223b8aa42c0f4bf9b4a7a71c16d0f67b5faf5045.zip u-boot-imx-223b8aa42c0f4bf9b4a7a71c16d0f67b5faf5045.tar.gz u-boot-imx-223b8aa42c0f4bf9b4a7a71c16d0f67b5faf5045.tar.bz2 | |
Beagleboard: Correct memory size on rev C4
The logic for the rev C4 boards was missing one of the cases
(variant with Micron NAND and 2x128MB).
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Diffstat (limited to 'board/ti/beagle')
| -rw-r--r-- | board/ti/beagle/beagle.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 5c04b34..2cca6da 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -166,6 +166,13 @@ void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, *ctrlb = NUMONYX_V_ACTIMB_165; *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; break; + } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { + /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ + *mcfg = MICRON_V_MCFG_165(128 << 20); + *ctrla = MICRON_V_ACTIMA_165; + *ctrlb = MICRON_V_ACTIMB_165; + *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; + break; } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { /* Beagleboard Rev C5, 256MB DDR */ *mcfg = MICRON_V_MCFG_200(256 << 20); |