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| author | Chandan Nath <chandan.nath@ti.com> | 2012-01-09 20:38:58 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-01-16 08:40:12 +0100 |
| commit | 876bdd6d460cfcb7dc3b3c52291e20d322a939d5 (patch) | |
| tree | cd46cdf82bd7309d10411bc775faeccf61bd2666 /board/ti/am335x | |
| parent | 750b4bfe1011dbb0fb1836fb84546c656d4995cf (diff) | |
| download | u-boot-imx-876bdd6d460cfcb7dc3b3c52291e20d322a939d5.zip u-boot-imx-876bdd6d460cfcb7dc3b3c52291e20d322a939d5.tar.gz u-boot-imx-876bdd6d460cfcb7dc3b3c52291e20d322a939d5.tar.bz2 | |
ARM:AM33XX: Add mmc/sd support
This patch add supports for mmc/sd driver on AM335X platform.
PLL and pinmux configurations for mmc/sd are configured in this
patch.
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/ti/am335x')
| -rw-r--r-- | board/ti/am335x/mux.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 8f27409..27f5f30 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -258,6 +258,20 @@ static struct module_pin_mux uart0_pin_mux[] = { {-1}, }; +#ifdef CONFIG_MMC +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */ + {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ + {-1}, +}; +#endif + /* * Configure the pin mux for the module */ @@ -276,3 +290,10 @@ void enable_uart0_pin_mux(void) { configure_module_pin_mux(uart0_pin_mux); } + +#ifdef CONFIG_MMC +void enable_mmc0_pin_mux(void) +{ + configure_module_pin_mux(mmc0_pin_mux); +} +#endif |