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| author | Stefan Roese <sr@denx.de> | 2008-08-14 08:25:13 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-08-14 08:25:13 +0200 |
| commit | becbbc7b2a1be44d38779c80ce94fb20e5e13f12 (patch) | |
| tree | 38e933b70075e14b21fbb0eb891cc8c59d8e60be /board/sc3/sc3nand.c | |
| parent | bc9019e19758a19a388fb20ef18dc771cd39fdda (diff) | |
| parent | 2fd0aad443c966ce62008225e57b18e2dcf4e330 (diff) | |
| download | u-boot-imx-becbbc7b2a1be44d38779c80ce94fb20e5e13f12.zip u-boot-imx-becbbc7b2a1be44d38779c80ce94fb20e5e13f12.tar.gz u-boot-imx-becbbc7b2a1be44d38779c80ce94fb20e5e13f12.tar.bz2 | |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next
Diffstat (limited to 'board/sc3/sc3nand.c')
| -rw-r--r-- | board/sc3/sc3nand.c | 44 |
1 files changed, 20 insertions, 24 deletions
diff --git a/board/sc3/sc3nand.c b/board/sc3/sc3nand.c index 009567b..45eff28 100644 --- a/board/sc3/sc3nand.c +++ b/board/sc3/sc3nand.c @@ -39,30 +39,26 @@ static void *sc3_io_base; static void *sc3_control_base = (void *)0xEF600700; -static void sc3_nand_hwcontrol(struct mtd_info *mtd, int cmd) +static void sc3_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - switch (cmd) { - case NAND_CTL_SETCLE: - set_bit (SC3_NAND_CLE, sc3_control_base); - break; - case NAND_CTL_CLRCLE: - clear_bit (SC3_NAND_CLE, sc3_control_base); - break; - - case NAND_CTL_SETALE: - set_bit (SC3_NAND_ALE, sc3_control_base); - break; - case NAND_CTL_CLRALE: - clear_bit (SC3_NAND_ALE, sc3_control_base); - break; - - case NAND_CTL_SETNCE: - set_bit (SC3_NAND_CE, sc3_control_base); - break; - case NAND_CTL_CLRNCE: - clear_bit (SC3_NAND_CE, sc3_control_base); - break; + struct nand_chip *this = mtd->priv; + if (ctrl & NAND_CTRL_CHANGE) { + if ( ctrl & NAND_CLE ) + set_bit (SC3_NAND_CLE, sc3_control_base); + else + clear_bit (SC3_NAND_CLE, sc3_control_base); + if ( ctrl & NAND_ALE ) + set_bit (SC3_NAND_ALE, sc3_control_base); + else + clear_bit (SC3_NAND_ALE, sc3_control_base); + if ( ctrl & NAND_NCE ) + set_bit (SC3_NAND_CE, sc3_control_base); + else + clear_bit (SC3_NAND_CE, sc3_control_base); } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); } static int sc3_nand_dev_ready(struct mtd_info *mtd) @@ -79,14 +75,14 @@ static void sc3_select_chip(struct mtd_info *mtd, int chip) int board_nand_init(struct nand_chip *nand) { - nand->eccmode = NAND_ECC_SOFT; + nand->ecc.mode = NAND_ECC_SOFT; sc3_io_base = (void *) CFG_NAND_BASE; /* Set address of NAND IO lines (Using Linear Data Access Region) */ nand->IO_ADDR_R = (void __iomem *) sc3_io_base; nand->IO_ADDR_W = (void __iomem *) sc3_io_base; /* Reference hardware control function */ - nand->hwcontrol = sc3_nand_hwcontrol; + nand->cmd_ctrl = sc3_nand_hwcontrol; nand->dev_ready = sc3_nand_dev_ready; nand->select_chip = sc3_select_chip; return 0; |