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authorMarek Vasut <marex@denx.de>2015-12-01 18:09:52 +0100
committerMarek Vasut <marex@denx.de>2016-06-01 22:44:14 +0200
commit569a191a864cee66e3d0763179e8688499de0377 (patch)
tree3546c3813f6dce6b6cc63747906588f176c8e945 /board/samtec/vining_fpga/socfpga.c
parent8b528709c5bba6a8d0ec83b20545bbd75f082704 (diff)
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arm: socfpga: Add samtec VIN|ING board
Add support for board based on the popular Altera Cyclone V SoC. This board has the following properties: - 1 GiB of DRAM - 1 Gigabit ethernet - 1 USB gadget port - 1 USB host port with an on-board hub - 2 QSPI NORs connected to the Cadence QSPI core - Multiple I2C EEPROMs and one I2C temperature sensor Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> --- V2: Update the defconfig as per Tom's request
Diffstat (limited to 'board/samtec/vining_fpga/socfpga.c')
-rw-r--r--board/samtec/vining_fpga/socfpga.c100
1 files changed, 100 insertions, 0 deletions
diff --git a/board/samtec/vining_fpga/socfpga.c b/board/samtec/vining_fpga/socfpga.c
new file mode 100644
index 0000000..f3a92b5
--- /dev/null
+++ b/board/samtec/vining_fpga/socfpga.c
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/reset_manager.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <i2c.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+int board_late_init(void)
+{
+ const unsigned int phy_nrst_gpio = 0;
+ const unsigned int usb_nrst_gpio = 35;
+ int ret;
+
+ status_led_set(1, STATUS_LED_ON);
+ status_led_set(2, STATUS_LED_ON);
+
+ /* Address of boot parameters for ATAG (if ATAG is used) */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ ret = gpio_request(phy_nrst_gpio, "phy_nrst_gpio");
+ if (!ret)
+ gpio_direction_output(phy_nrst_gpio, 1);
+ else
+ printf("Cannot remove PHY from reset!\n");
+
+ ret = gpio_request(usb_nrst_gpio, "usb_nrst_gpio");
+ if (!ret)
+ gpio_direction_output(usb_nrst_gpio, 1);
+ else
+ printf("Cannot remove USB from reset!\n");
+
+ mdelay(50);
+
+ return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
+int misc_init_r(void)
+{
+ uchar data[128];
+ char str[32];
+ u32 serial;
+ int ret;
+
+ /* EEPROM is at bus 0. */
+ ret = i2c_set_bus_num(0);
+ if (ret) {
+ puts("Cannot select EEPROM I2C bus.\n");
+ return 0;
+ }
+
+ /* EEPROM is at address 0x50. */
+ ret = eeprom_read(0x50, 0, data, sizeof(data));
+ if (ret) {
+ puts("Cannot read I2C EEPROM.\n");
+ return 0;
+ }
+
+ /* Check EEPROM signature. */
+ if (!(data[0] == 0xa5 && data[1] == 0x5a)) {
+ puts("Invalid I2C EEPROM signature.\n");
+ setenv("unit_serial", "invalid");
+ setenv("unit_ident", "VINing-xxxx-STD");
+ setenv("hostname", "vining-invalid");
+ return 0;
+ }
+
+ /* If 'unit_serial' is already set, do nothing. */
+ if (!getenv("unit_serial")) {
+ /* This field is Big Endian ! */
+ serial = (data[0x54] << 24) | (data[0x55] << 16) |
+ (data[0x56] << 8) | (data[0x57] << 0);
+ memset(str, 0, sizeof(str));
+ sprintf(str, "%07i", serial);
+ setenv("unit_serial", str);
+ }
+
+ if (!getenv("unit_ident")) {
+ memset(str, 0, sizeof(str));
+ memcpy(str, &data[0x2e], 18);
+ setenv("unit_ident", str);
+ }
+
+ /* Set ethernet address from EEPROM. */
+ if (!getenv("ethaddr") && is_valid_ethaddr(&data[0x62]))
+ eth_setenv_enetaddr("ethaddr", &data[0x62]);
+
+ return 0;
+}
+#endif