diff options
| author | Niklaus Giger <niklaus.giger@member.fsf.org> | 2009-10-04 20:04:20 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-10-07 09:15:20 +0200 |
| commit | ddc922ff2c20ae0b7f9ce2df1ac28143e2f325bd (patch) | |
| tree | 5c390395480e4cfd575ef751edd34034eaffa142 /board/prodrive/p3p440/p3p440.c | |
| parent | f80e61dcfe53fa3a5936659883415c9bd1b5a3d9 (diff) | |
| download | u-boot-imx-ddc922ff2c20ae0b7f9ce2df1ac28143e2f325bd.zip u-boot-imx-ddc922ff2c20ae0b7f9ce2df1ac28143e2f325bd.tar.gz u-boot-imx-ddc922ff2c20ae0b7f9ce2df1ac28143e2f325bd.tar.bz2 | |
ppc_4xx: Apply new HW register names
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.
Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/prodrive/p3p440/p3p440.c')
| -rw-r--r-- | board/prodrive/p3p440/p3p440.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/board/prodrive/p3p440/p3p440.c b/board/prodrive/p3p440/p3p440.c index 20fd4dc..9a07852 100644 --- a/board/prodrive/p3p440/p3p440.c +++ b/board/prodrive/p3p440/p3p440.c @@ -209,28 +209,28 @@ void pci_target_init(struct pci_controller *hose) /*--------------------------------------------------------------------------+ * Disable everything *--------------------------------------------------------------------------*/ - out32r(PCIX0_PIM0SA, 0); /* disable */ - out32r(PCIX0_PIM1SA, 0); /* disable */ - out32r(PCIX0_PIM2SA, 0); /* disable */ - out32r(PCIX0_EROMBA, 0); /* disable expansion rom */ + out32r(PCIL0_PIM0SA, 0); /* disable */ + out32r(PCIL0_PIM1SA, 0); /* disable */ + out32r(PCIL0_PIM2SA, 0); /* disable */ + out32r(PCIL0_EROMBA, 0); /* disable expansion rom */ /*--------------------------------------------------------------------------+ * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping * options to not support sizes such as 128/256 MB. *--------------------------------------------------------------------------*/ - out32r(PCIX0_PIM0LAL, CONFIG_SYS_SDRAM_BASE); - out32r(PCIX0_PIM0LAH, 0); - out32r(PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1); + out32r(PCIL0_PIM0LAL, CONFIG_SYS_SDRAM_BASE); + out32r(PCIL0_PIM0LAH, 0); + out32r(PCIL0_PIM0SA, ~(gd->ram_size - 1) | 1); - out32r(PCIX0_BAR0, 0); + out32r(PCIL0_BAR0, 0); /*--------------------------------------------------------------------------+ * Program the board's subsystem id/vendor id *--------------------------------------------------------------------------*/ - out16r(PCIX0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID); - out16r(PCIX0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID); + out16r(PCIL0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID); + out16r(PCIL0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID); - out16r(PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY); + out16r(PCIL0_CMD, in16r(PCIL0_CMD) | PCI_COMMAND_MEMORY); } #endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */ |