diff options
| author | Stephen Warren <swarren@nvidia.com> | 2016-07-18 13:02:11 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2016-07-21 09:31:30 -0700 |
| commit | efbb3d491e87935421242396958fdddd87e0fde1 (patch) | |
| tree | a1cc8fc074a880469e22aa45ebf3906df8924cb6 /board/nvidia/p2371-2180 | |
| parent | 49626ea801e8bb33c9ee4cbcb69e2fea6b13c330 (diff) | |
| download | u-boot-imx-efbb3d491e87935421242396958fdddd87e0fde1.zip u-boot-imx-efbb3d491e87935421242396958fdddd87e0fde1.tar.gz u-boot-imx-efbb3d491e87935421242396958fdddd87e0fde1.tar.bz2 | |
ARM: tegra: p2371-2180: A03 board PMIC config update
Rev A03 of P2180 requires some PMIC programming adjustments, yet the
PMIC's own OTP has not been updated. Consequently, U-Boot must make
these changes itself.
NVIDIA's syseng team has confirmed that these changes can be enabled on
all board revisions without issue.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia/p2371-2180')
| -rw-r--r-- | board/nvidia/p2371-2180/p2371-2180.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c index 0f587ea..dbdc1b6 100644 --- a/board/nvidia/p2371-2180/p2371-2180.c +++ b/board/nvidia/p2371-2180/p2371-2180.c @@ -30,6 +30,28 @@ void pin_mux_mmc(void) ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); if (ret) printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); + + /* Disable LDO4 discharge */ + ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); + if (ret) { + printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); + } else { + val &= ~BIT(1); /* ADE */ + ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); + if (ret) + printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); + } + + /* Set MBLPD */ + ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); + if (ret) { + printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); + } else { + val |= BIT(6); /* MBLPD */ + ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); + if (ret) + printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); + } } /* |