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author | Matthias Fuchs <matthias.fuchs@esd.eu> | 2009-07-22 17:27:56 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2009-07-24 06:47:17 +0200 |
commit | 58ea142fb2e969f32306c8da1dabfaebd6fa141a (patch) | |
tree | 6f6054a161a5c439b29e85f874531093390623bc /board/mpl | |
parent | 87c0b72908e05662b8b415e26e1042f4779629da (diff) | |
download | u-boot-imx-58ea142fb2e969f32306c8da1dabfaebd6fa141a.zip u-boot-imx-58ea142fb2e969f32306c8da1dabfaebd6fa141a.tar.gz u-boot-imx-58ea142fb2e969f32306c8da1dabfaebd6fa141a.tar.bz2 |
ppc4xx: Replace 4xx lowercase SPR references
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/mpl')
-rw-r--r-- | board/mpl/mip405/mip405.c | 2 | ||||
-rw-r--r-- | board/mpl/pip405/pip405.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index 24caa46..1738f54 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -688,7 +688,7 @@ int misc_init_r (void) start=get_timer(0); /* if MIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */ if (mfdcr(strap) & PSR_ROM_LOC) - mtspr(ccr0, (mfspr(ccr0) & ~0x80)); + mtspr(SPRN_CCR0, (mfspr(SPRN_CCR0) & ~0x80)); return (0); } diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index f31a5e8..677437d 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -669,7 +669,7 @@ int misc_init_r (void) /* if PIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */ if (mfdcr(strap) & PSR_ROM_LOC) - mtspr(ccr0, (mfspr(ccr0) & ~0x80)); + mtspr(SPRN_CCR0, (mfspr(SPRN_CCR0) & ~0x80)); return (0); } |