From 58ea142fb2e969f32306c8da1dabfaebd6fa141a Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Wed, 22 Jul 2009 17:27:56 +0200 Subject: ppc4xx: Replace 4xx lowercase SPR references Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- board/mpl/mip405/mip405.c | 2 +- board/mpl/pip405/pip405.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'board/mpl') diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index 24caa46..1738f54 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -688,7 +688,7 @@ int misc_init_r (void) start=get_timer(0); /* if MIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */ if (mfdcr(strap) & PSR_ROM_LOC) - mtspr(ccr0, (mfspr(ccr0) & ~0x80)); + mtspr(SPRN_CCR0, (mfspr(SPRN_CCR0) & ~0x80)); return (0); } diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index f31a5e8..677437d 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -669,7 +669,7 @@ int misc_init_r (void) /* if PIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */ if (mfdcr(strap) & PSR_ROM_LOC) - mtspr(ccr0, (mfspr(ccr0) & ~0x80)); + mtspr(SPRN_CCR0, (mfspr(SPRN_CCR0) & ~0x80)); return (0); } -- cgit v1.1